| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64ExternalSymbolizer.cpp | 110 MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand()
119 } else if (MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand()
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| /openbsd-src/regress/lib/libcrypto/x509/bettertls/certificates/ |
| H A D | 2633.chain | 17 ADR/BWBmJPbuUuYciJvlTL5AC2nV9PruwZRHCG6Tzeu4nB5twwgxM7/0X/vWtfMX
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedPredExynos.td | 122 [ADR, ADRP,
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| H A D | AArch64MacroFusion.cpp | 229 case AArch64::ADR: in isAddressLdStPair()
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| H A D | AArch64ISelLowering.h | 76 ADR, // ADR enumerator
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| H A D | AArch64SchedCyclone.td | 141 // ADR,ADRP
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| H A D | AArch64AsmPrinter.cpp | 1017 EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::ADR) in LowerJumpTableDest()
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| H A D | AArch64SchedExynosM3.td | 510 def : InstRW<[M3WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedTSV110.td | 410 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedAmpere1.td | 979 def : InstRW<[Ampere1Write_1cyc_1A], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedExynosM4.td | 607 def : InstRW<[M4WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedExynosM5.td | 654 def : InstRW<[M5WriteZ0], (instrs ADR, ADRP)>;
|
| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Scalar/ |
| H A D | LoopRerollPass.cpp | 898 const auto *ADR = dyn_cast<SCEVAddRecExpr>(SE->getSCEV(DRS.BaseInst)); in validateRootSet() local
899 if (!ADR) in validateRootSet()
904 const SCEV *StepSCEV = SE->getMinusSCEV(SE->getSCEV(DRS.Roots[0]), ADR); in validateRootSet()
908 if (ADR->getStepRecurrence(*SE) != SE->getMulExpr(StepSCEV, ScaleSCEV)) in validateRootSet()
|
| /openbsd-src/gnu/usr.bin/binutils/gas/doc/ |
| H A D | c-arm.texi | 427 @cindex @code{ADR reg,<label>} pseudo op, ARM
428 @item ADR
437 the ADR instruction, then an error will be generated. This instruction
|
| /openbsd-src/gnu/usr.bin/binutils-2.17/gas/doc/ |
| H A D | c-arm.texi | 571 @cindex @code{ADR reg,<label>} pseudo op, ARM
572 @item ADR
581 the ADR instruction, then an error will be generated. This instruction
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrHFP.td | 134 def ADR : BinaryRR<"adr", 0x2A, null_frag, FP64, FP64>;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 260 MCFixupKind Kind = MI.getOpcode() == AArch64::ADR in getAdrLabelOpValue()
|
| /openbsd-src/usr.bin/file/magdir/ |
| H A D | hp | 211 >8 leshort 0x2911 (ADR)
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1377 : ARM::ADR)) in emitInstruction()
1393 : ARM::ADR)) in emitInstruction()
|
| H A D | ARMScheduleSwift.td | 129 // ADC,ADD,NEG,RSB,RSC,SBC,SUB,ADR
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| H A D | ARMScheduleR52.td | 326 (instregex "ADR", "MOVsi", "MVNS?s?i", "t2MOVS?si")>;
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| /openbsd-src/gnu/usr.bin/binutils-2.17/binutils/po/ |
| H A D | sv.po | 2392 " --start-address=ADR Behandla endast data p� adresser >= ADR\n"
2393 " --stop-address=ADR Behandla endast data p� adresser <= ADR\n"
|
| H A D | da.po | 2119 " --start-address=ADR Behandl kun data p� adresser >= ADR\n"
2120 " --stop-address=ADR Behandl kun data p� adresser <= ADR\n"
|
| /openbsd-src/gnu/usr.bin/binutils/binutils/po/ |
| H A D | da.po | 2119 " --start-address=ADR Behandl kun data p� adresser >= ADR\n"
2120 " --stop-address=ADR Behandl kun data p� adresser <= ADR\n"
|
| H A D | sv.po | 2392 " --start-address=ADR Behandla endast data p� adresser >= ADR\n"
2393 " --stop-address=ADR Behandla endast data p� adresser <= ADR\n"
|