Searched refs:composeSubRegIndices (Results 1 – 8 of 8) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetRegisterInfo.cpp | 349 unsigned FinalA = composeSubRegIndices(IA.getSubReg(), SubA); in getCommonSuperRegClass()
358 unsigned FinalB = composeSubRegIndices(IB.getSubReg(), SubB); in getCommonSuperRegClass()
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| H A D | RegisterCoalescer.cpp | 413 DstSub = tri.composeSubRegIndices(MI->getOperand(0).getSubReg(), in INITIALIZE_PASS_DEPENDENCY()
570 return TRI.composeSubRegIndices(SrcIdx, SrcSub) == in isCoalescable()
571 TRI.composeSubRegIndices(DstIdx, DstSub); in isCoalescable()
1315 unsigned NewDstIdx = TRI->composeSubRegIndices(CP.getSrcIdx(), in reMaterializeTrivialDef()
1772 unsigned SubUseIdx = TRI->composeSubRegIndices(SubIdx, MO.getSubReg()); in updateRegDefsUses()
2543 TRI->composeSubRegIndices(SubIdx, MO.getSubReg())); in computeWriteLanes()
2972 unsigned S = TRI->composeSubRegIndices(SubIdx, MO.getSubReg()); in usesLanes()
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| H A D | DetectDeadLanes.cpp | 175 SrcSubIdx = TRI.composeSubRegIndices(SubReg, SrcSubIdx); in isCrossCopy()
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| H A D | TailDuplicator.cpp | 436 MO.setSubReg(TRI->composeSubRegIndices(MO.getSubReg(), in duplicateInstruction()
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| H A D | MachineOperand.cpp | 81 SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg()); in substVirtReg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 629 unsigned composeSubRegIndices(unsigned a, unsigned b) const { in composeSubRegIndices() function
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 241 unsigned ComposedSubIdx = TRI.composeSubRegIndices(MO.getSubReg(), SubIdx); in getSubOperand64()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1139 SubRegIdx = TRI->composeSubRegIndices(SubRegIdx, in decomposeSubvectorInsertExtractToSubRegs()
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