Searched refs:bitsGT (Results 1 – 18 of 18) sorted by relevance
249 bool bitsGT(EVT VT) const { in bitsGT() function
105 if (Src.getValueType().bitsGT(MVT::i32)) in EmitSpecializedLibcall()
12076 unsigned ExtOp = VT.bitsGT(tmp.getValueType()) ? ISD::ANY_EXTEND : ISD::TRUNCATE; in AddCombineBUILD_VECTORToVPADDL()
138 if (AVT.bitsGT(MVT::i8)) { in EmitTargetCodeForMemset()
3628 if (DstVT.bitsGT(SrcVT)) in fastSelectInstruction()
21946 if (Sign.getSimpleValueType().bitsGT(VT)) in LowerFCOPYSIGN()28135 if (EltVT != MVT::i64 && EltVT.bitsGT(MVT::i32)) in LowerScalarVariableShift()
1243 return VT.bitsGT(Op.getValueType()) in getFPExtendOrRound()1254 VT.bitsGT(Op.getValueType()) in getStrictFPExtendOrRound()1263 return VT.bitsGT(Op.getValueType()) ? in getAnyExtOrTrunc()1269 return VT.bitsGT(Op.getValueType()) ? in getSExtOrTrunc()1275 return VT.bitsGT(Op.getValueType()) ? in getZExtOrTrunc()4552 if (SVT.bitsGT(VT.getScalarType())) { in foldCONCAT_VECTORS()4914 assert(Operand.getValueType().bitsGT(VT) && in getNode()4924 if (Operand.getOperand(0).getValueType().bitsGT(VT)) in getNode()5239 if (V1.getValueType().bitsGT(SVT)) in FoldConstantArithmetic()5241 if (V2.getValueType().bitsGT(SVT)) in FoldConstantArithmetic()[all …]
397 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()1783 if (DstVT.bitsGT(SrcVT)) in selectOperator()
5215 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()12029 if (N0.getOperand(0).getValueType().bitsGT(VT)) in visitTRUNCATE()18401 ISD::LoadExtType ExtTy = ResultVT.bitsGT(VecEltVT) ? in scalarizeExtractedVectorLoad()18437 if (ResultVT.bitsGT(VecEltVT)) { in scalarizeExtractedVectorLoad()18709 if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType())) in visitEXTRACT_VECTOR_ELT()22159 if (XType.bitsGT(AType)) { in foldSelectCCToShiftAnd()22179 if (XType.bitsGT(AType)) { in foldSelectCCToShiftAnd()
228 if (VT.bitsGT(LVT)) in findOptimalMemOpLowering()3847 if (Op0.getValueType().bitsGT(VT)) in SimplifySetCC()
1599 if (EltVT.bitsGT(Elt.getValueType())) in SplitVecRes_INSERT_VECTOR_ELT()
1066 bool bitsGT(MVT VT) const { in bitsGT() function
1591 return VT.bitsGT(MVT::i32) && Alignment >= Align(4); in allowsMisalignedMemoryAccesses()1838 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
1744 if (SVT.isInteger() && SVT.bitsGT(XLenVT)) { in lowerVECTOR_SHUFFLE()1853 if (IndexVT.getScalarType().bitsGT(XLenVT)) { in lowerVECTOR_SHUFFLE()1905 unsigned RVVOpc = ContainerVT.bitsGT(Op.getSimpleValueType()) in getRVVFPExtendOrRound()3777 if (VecVT.bitsGT(getLMUL1VT(VecVT))) { in lowerINSERT_SUBVECTOR()3806 if (VecVT.bitsGT(InterSubVT)) in lowerINSERT_SUBVECTOR()3911 if (VecVT.bitsGT(getLMUL1VT(VecVT))) { in lowerEXTRACT_SUBVECTOR()
4874 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
6733 else if (SrcVT.bitsGT(VT)) in LowerFCOPYSIGN()
6529 if (!LoadResultVT.bitsGT(TruncVT) || !TruncVT.isRound() || in optimizeLoadExt()
14764 if (Op1VT.bitsGT(mVT)) { in PerformDAGCombine()