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Searched refs:TargetSubtargetInfo (Results 1 – 25 of 84) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetSubtargetInfo.cpp17 TargetSubtargetInfo::TargetSubtargetInfo( in TargetSubtargetInfo() function in TargetSubtargetInfo
25 TargetSubtargetInfo::~TargetSubtargetInfo() = default;
27 bool TargetSubtargetInfo::enableAtomicExpand() const { in enableAtomicExpand()
31 bool TargetSubtargetInfo::enableIndirectBrExpand() const { in enableIndirectBrExpand()
35 bool TargetSubtargetInfo::enableMachineScheduler() const { in enableMachineScheduler()
39 bool TargetSubtargetInfo::enableJoinGlobalCopies() const { in enableJoinGlobalCopies()
43 bool TargetSubtargetInfo::enableRALocalReassignment( in enableRALocalReassignment()
48 bool TargetSubtargetInfo::enableAdvancedRASplitCost() const { in enableAdvancedRASplitCost()
52 bool TargetSubtargetInfo::enablePostRAScheduler() const { in enablePostRAScheduler()
56 bool TargetSubtargetInfo::enablePostRAMachineScheduler() const { in enablePostRAMachineScheduler()
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H A DPostRASchedulerList.cpp106 const TargetSubtargetInfo &ST, CodeGenOpt::Level OptLevel,
107 TargetSubtargetInfo::AntiDepBreakMode &Mode,
108 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const;
148 TargetSubtargetInfo::AntiDepBreakMode AntiDepMode,
207 TargetSubtargetInfo::AntiDepBreakMode AntiDepMode, in SchedulePostRATDList()
218 assert((AntiDepMode == TargetSubtargetInfo::ANTIDEP_NONE || in SchedulePostRATDList()
221 AntiDepBreak = ((AntiDepMode == TargetSubtargetInfo::ANTIDEP_ALL) in SchedulePostRATDList()
223 : ((AntiDepMode == TargetSubtargetInfo::ANTIDEP_CRITICAL) in SchedulePostRATDList()
265 const TargetSubtargetInfo &ST, in enablePostRAScheduler()
267 TargetSubtargetInfo::AntiDepBreakMode &Mode, in enablePostRAScheduler()
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H A DRegisterUsageInfo.cpp92 = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first)) in print()
H A DAggressiveAntiDepBreaker.h134 TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
H A DScheduleDAGInstrs.cpp120 const TargetSubtargetInfo &ST = mf.getSubtarget(); in ScheduleDAGInstrs()
238 const TargetSubtargetInfo &ST = MF.getSubtarget(); in addPhysRegDataDeps()
299 const TargetSubtargetInfo &ST = MF.getSubtarget(); in addPhysRegDeps()
433 const TargetSubtargetInfo &ST = MF.getSubtarget(); in addVRegDefDeps()
735 const TargetSubtargetInfo &ST = MF.getSubtarget(); in buildSchedGraph()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetSubtargetInfo.h59 class TargetSubtargetInfo : public MCSubtargetInfo {
61 TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
75 TargetSubtargetInfo() = delete;
76 TargetSubtargetInfo(const TargetSubtargetInfo &) = delete;
77 TargetSubtargetInfo &operator=(const TargetSubtargetInfo &) = delete;
78 ~TargetSubtargetInfo() override;
H A DTargetSchedule.h36 const TargetSubtargetInfo *STI = nullptr;
57 void init(const TargetSubtargetInfo *TSInfo);
63 const TargetSubtargetInfo *getSubtargetInfo() const { return STI; } in getSubtargetInfo()
H A DMacroFusion.h25 class TargetSubtargetInfo; variable
31 const TargetSubtargetInfo &TSI,
H A DModuloSchedule.h170 const TargetSubtargetInfo &ST;
295 const TargetSubtargetInfo &ST;
H A DAntiDepBreaker.h89 TargetSubtargetInfo::RegClassVector &CriticalPathRCs);
H A DMachineFunction.h73 class TargetSubtargetInfo; variable
233 const TargetSubtargetInfo *STI;
476 const TargetSubtargetInfo &STI, unsigned FunctionNum,
558 const TargetSubtargetInfo &getSubtarget() const { return *STI; }
H A DTargetInstrInfo.h62 class TargetSubtargetInfo; variable
1491 const TargetSubtargetInfo *STI = nullptr) const;
1496 CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
1763 CreateTargetScheduleState(const TargetSubtargetInfo &) const { in CreateTargetScheduleState() argument
H A DMachinePipeliner.h449 ResourceManager(const TargetSubtargetInfo *ST) in ResourceManager()
507 const TargetSubtargetInfo &ST;
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/MIRParser/
H A DMIParser.h33 class TargetSubtargetInfo; variable
53 const TargetSubtargetInfo &Subtarget;
149 PerTargetMIParsingState(const TargetSubtargetInfo &STI) in PerTargetMIParsingState()
157 void setTarget(const TargetSubtargetInfo &NewSubtarget);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetMachine.h46 const TargetSubtargetInfo *getSubtargetImpl() const;
47 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
H A DAMDGPUMCInstLower.cpp41 const TargetSubtargetInfo &ST;
48 AMDGPUMCInstLower(MCContext &ctx, const TargetSubtargetInfo &ST,
73 const TargetSubtargetInfo &st, in AMDGPUMCInstLower()
H A DAMDGPUMacroFusion.cpp27 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
H A DAMDGPUTargetTransformInfo.h46 const TargetSubtargetInfo *ST;
49 const TargetSubtargetInfo *getST() const { return ST; } in getST()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMMacroFusion.cpp52 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86MacroFusion.cpp35 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/
H A DTargetMachine.h59 class TargetSubtargetInfo; variable
130 virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const { in getSubtargetImpl()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64StorePairSuppress.cpp125 const TargetSubtargetInfo &ST = MF.getSubtarget(); in runOnMachineFunction()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp145 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h260 const TargetSubtargetInfo *STI = nullptr) const override;
284 CreateTargetScheduleState(const TargetSubtargetInfo &STI) const override;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGVLIW.cpp73 const TargetSubtargetInfo &STI = mf.getSubtarget(); in ScheduleDAGVLIW()

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