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Searched refs:SimpleTy (Results 1 – 25 of 62) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/
H A DMachineValueType.h304 SimpleValueType SimpleTy = INVALID_SIMPLE_VALUE_TYPE; variable
307 constexpr MVT(SimpleValueType SVT) : SimpleTy(SVT) {} in MVT()
309 bool operator>(const MVT& S) const { return SimpleTy > S.SimpleTy; }
310 bool operator<(const MVT& S) const { return SimpleTy < S.SimpleTy; }
311 bool operator==(const MVT& S) const { return SimpleTy == S.SimpleTy; }
312 bool operator!=(const MVT& S) const { return SimpleTy != S.SimpleTy; }
313 bool operator>=(const MVT& S) const { return SimpleTy >= S.SimpleTy; }
314 bool operator<=(const MVT& S) const { return SimpleTy <= S.SimpleTy; }
318 return (SimpleTy >= MVT::FIRST_VALUETYPE && in isValid()
319 SimpleTy < MVT::LAST_VALUETYPE); in isValid()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DValueTypes.h49 if (V.SimpleTy != VT.V.SimpleTy)
51 if (V.SimpleTy == MVT::INVALID_SIMPLE_VALUE_TYPE)
67 if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE) in getIntegerVT()
77 if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE)
86 if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE) in getVectorVT()
125 return V.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE; in isSimple()
458 return V.SimpleTy; in getRawBits()
467 if (L.V.SimpleTy == R.V.SimpleTy) in operator()
470 return L.V.SimpleTy < R.V.SimpleTy; in operator()
H A DTargetLowering.h848 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];
869 const TargetRegisterClass *RC = RepRegClassForVT[VT.SimpleTy]; in getRepRegClassFor()
876 return RepRegClassCostForVT[VT.SimpleTy]; in getRepRegClassCostFor()
891 (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT)); in isTypeLegal()
892 return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr; in isTypeLegal()
907 return ValueTypeActions[VT.SimpleTy]; in getTypeAction()
911 ValueTypeActions[VT.SimpleTy] = Action; in setTypeAction()
1046 return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op]; in getOperationAction()
1223 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getLoadExtAction()
1224 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getLoadExtAction()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp903 fromType = ScalarVT.SimpleTy == MVT::f16 ? NVPTX::PTXLdStInstCode::Untyped in tryLoad()
914 MVT::SimpleValueType TargetVT = LD->getSimpleValueType(0).SimpleTy; in tryLoad()
1041 FromType = ScalarVT.SimpleTy == MVT::f16 ? NVPTX::PTXLdStInstCode::Untyped in tryLoadVector()
1076 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector()
1084 pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4_avar, in tryLoadVector()
1103 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector()
1111 pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4_asi, in tryLoadVector()
1132 EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v2_ari_64, in tryLoadVector()
1140 EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4_ari_64, in tryLoadVector()
1151 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector()
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H A DNVPTXTargetTransformInfo.cpp395 if (LT.second.SimpleTy == MVT::i64) in getArithmeticInstrCost()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.cpp133 if (LocVT.SimpleTy == MVT::i64 || (IsDarwinILP32 && LocVT.SimpleTy == MVT::i32)) in CC_AArch64_Custom_Block()
135 else if (LocVT.SimpleTy == MVT::f16) in CC_AArch64_Custom_Block()
137 else if (LocVT.SimpleTy == MVT::f32 || LocVT.is32BitVector()) in CC_AArch64_Custom_Block()
139 else if (LocVT.SimpleTy == MVT::f64 || LocVT.is64BitVector()) in CC_AArch64_Custom_Block()
141 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
162 unsigned EltsPerReg = (IsDarwinILP32 && LocVT.SimpleTy == MVT::i32) ? 2 : 1; in CC_AArch64_Custom_Block()
H A DAArch64FastISel.cpp319 switch (VT.SimpleTy) { in getImplicitScaleFactor()
1142 switch (RetVT.SimpleTy) { in emitAddSub()
1161 RetVT.SimpleTy = std::max(RetVT.SimpleTy, MVT::i32); in emitAddSub()
1455 switch (VT.SimpleTy) { in emitCmp()
1632 MVT VT = std::max(MVT::i32, RetVT.SimpleTy); in emitLogicalOp()
1653 switch (RetVT.SimpleTy) { in emitLogicalOp_ri()
1703 switch (RetVT.SimpleTy) { in emitLogicalOp_rs()
1810 switch (VT.SimpleTy) { in emitLoad()
2040 switch (VT.SimpleTy) { in emitStoreRelease()
2099 switch (VT.SimpleTy) { in emitStore()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp177 auto isHvxTy = [this, IncludeBool](MVT SimpleTy) { in isTypeForHVX() argument
178 if (isHVXVectorType(SimpleTy, IncludeBool)) in isTypeForHVX()
180 auto Action = getTargetLowering()->getPreferredVectorAction(SimpleTy); in isTypeForHVX()
189 MVT SimpleTy = MVT::getVectorVT(ElemTy, VecLen); in isTypeForHVX() local
190 if (SimpleTy.isValid() && isHvxTy(SimpleTy)) in isTypeForHVX()
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenDAGPatterns.h89 return (Words[T.SimpleTy / WordWidth] >> (T.SimpleTy % WordWidth)) & 1; in count()
92 bool V = count(T.SimpleTy); in insert()
93 Words[T.SimpleTy / WordWidth] |= WordType(1) << (T.SimpleTy % WordWidth); in insert()
103 Words[T.SimpleTy / WordWidth] &= ~(WordType(1) << (T.SimpleTy % WordWidth)); in erase()
704 return Types[ResNo].getMachineValueType().SimpleTy; in getSimpleType()
H A DInfoByHwMode.cpp77 StringRef N = llvm::getEnumName(T.SimpleTy); in getMVTName()
H A DDAGISelMatcherGen.cpp37 VT = VVT.getSimple().SimpleTy; in getRegisterValueType()
44 assert((!T.isSimple() || T.getSimple().SimpleTy == VT) && in getRegisterValueType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FastISel.cpp338 switch (VT.SimpleTy) { in X86FastEmitLoad()
499 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
671 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
1364 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpOpcode()
1387 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpImmediateOpcode()
1566 switch (SrcVT.SimpleTy) { in X86SelectZExt()
1734 switch (SourceVT.SimpleTy) { in X86SelectBranch()
1933 switch (VT.SimpleTy) { in X86SelectDivRem()
2261 switch (RetVT.SimpleTy) { in X86FastEmitSSESelect()
2284 switch (RetVT.SimpleTy) { in X86FastEmitPseudoSelect()
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H A DX86ISelDAGToDAG.cpp3180 switch (MemVT.getSimpleVT().SimpleTy) { in foldLoadStoreIntoMemOperand()
4336 switch (TestVT.SimpleTy) { in getVPTESTMOpc()
4342 switch (TestVT.SimpleTy) { in getVPTESTMOpc()
4347 switch (TestVT.SimpleTy) { in getVPTESTMOpc()
4887 switch (NVT.SimpleTy) { in Select()
4964 switch (NVT.SimpleTy) { in Select()
5046 switch (NVT.SimpleTy) { in Select()
5164 switch (NVT.SimpleTy) { in Select()
5172 switch (NVT.SimpleTy) { in Select()
5183 switch (NVT.SimpleTy) { in Select()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp138 switch (VT.SimpleTy) { in selectIndexedLoad()
180 switch (VT.SimpleTy) { in selectIndexedProgMemLoad()
388 switch (VT.SimpleTy) { in select()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600RegisterInfo.cpp89 switch(VT.SimpleTy) { in getCFGStructurizerRegClass()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp305 switch (VT.getSimpleVT().SimpleTy) { in isValidIndexedLoad()
333 switch (VT.SimpleTy) { in tryIndexedLoad()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp323 MVT::SimpleValueType SimpleTy = RegVT.getSimpleVT().SimpleTy; in LowerFormalArguments() local
324 switch (SimpleTy) { in LowerFormalArguments()
333 SimpleTy == MVT::i64 ? &BPF::GPRRegClass : &BPF::GPR32RegClass); in LowerFormalArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/Utils/
H A DWebAssemblyTypeUtilities.cpp128 switch (Type.SimpleTy) { in toValType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMFastISel.cpp804 switch (VT.SimpleTy) { in ARMSimplifyAddress()
860 if (VT.SimpleTy == MVT::f32 || VT.SimpleTy == MVT::f64) in AddLoadStoreOperands()
906 switch (VT.SimpleTy) { in ARMEmitLoad()
1043 switch (VT.SimpleTy) { in ARMEmitStore()
1378 switch (SrcVT.SimpleTy) { in ARMEmitCmp()
1812 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy)); in SelectBinaryFPOp()
1904 switch (ArgVT.SimpleTy) { in ProcessCallArgs()
3039 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
H A DARMCallingConv.cpp198 switch (LocVT.SimpleTy) { in CC_ARM_AAPCS_Custom_Aggregate()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp475 switch (VT.SimpleTy) { in getOUTLINE_ATOMIC()
552 switch (VT.SimpleTy) { \ in getSYNC()
934 assert((unsigned)SVT.SimpleTy < array_lengthof(TransformToType)); in getTypeConversion()
935 MVT NVT = TransformToType[SVT.SimpleTy]; in getTypeConversion()
1233 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy]; in findRepresentativeClass()
1488 return getPointerTy(DL).SimpleTy; in getSetCCResultType()
H A DValueTypes.cpp153 switch (V.SimpleTy) { in getEVTString()
182 switch (V.SimpleTy) { in getTypeForEVT()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp762 switch (VT.SimpleTy) { in emitLoad()
817 switch (VT.SimpleTy) { in emitStore()
1371 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
1832 switch (SrcVT.SimpleTy) { in emitIntSExt32r1()
1850 switch (SrcVT.SimpleTy) { in emitIntSExt32r2()
1876 switch (SrcVT.SimpleTy) { in emitIntZExt()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp312 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1); in ExpandConstantFP()
2045 switch (Node->getSimpleValueType(0).SimpleTy) { in ExpandFPLibCall()
2078 switch (Node->getSimpleValueType(0).SimpleTy) { in ExpandIntLibCall()
2101 switch (InVT.getSimpleVT().SimpleTy) { in ExpandArgFPLibCall()
2135 switch (Node->getSimpleValueType(0).SimpleTy) { in ExpandDivRemLibCall()
2196 switch (Node->getSimpleValueType(0).SimpleTy) { in isSinCosLibcallAvailable()
2230 switch (Node->getSimpleValueType(0).SimpleTy) { in ExpandSinCosLibCall()
2463 switch (SrcVT.getSimpleVT().SimpleTy) { in ExpandLegalINT_TO_FP()
2529 NewInTy = (MVT::SimpleValueType)(NewInTy.getSimpleVT().SimpleTy+1); in PromoteLegalINT_TO_FP()
2587 NewOutTy = (MVT::SimpleValueType)(NewOutTy.getSimpleVT().SimpleTy+1); in PromoteLegalFP_TO_INT()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp485 switch (RegVT.getSimpleVT().SimpleTy) { in LowerCallArguments()
488 << (unsigned)RegVT.getSimpleVT().SimpleTy << "\n"); in LowerCallArguments()

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