| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 256 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCall() local 285 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall() 313 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall() 314 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall() 315 RegsToPass[i].second, Glue); in LowerCall() 338 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall() 339 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall() 340 RegsToPass[i].second.getValueType())); in LowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.h | 48 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
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| H A D | Mips16ISelLowering.cpp | 410 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, in getOpndList() 489 RegsToPass.push_front(std::make_pair(V0Reg, Callee)); in getOpndList() 497 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee)); in getOpndList() 502 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, in getOpndList()
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| H A D | MipsSEISelLowering.h | 69 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
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| H A D | MipsISelLowering.cpp | 3021 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, in getOpndList() argument 3038 RegsToPass.push_back(std::make_pair(GPReg, getGlobalReg(CLI.DAG, Ty))); in getOpndList() 3047 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in getOpndList() 3048 Chain = CLI.DAG.getCopyToReg(Chain, CLI.DL, RegsToPass[i].first, in getOpndList() 3049 RegsToPass[i].second, InFlag); in getOpndList() 3055 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in getOpndList() 3056 Ops.push_back(CLI.DAG.getRegister(RegsToPass[i].first, in getOpndList() 3057 RegsToPass[i].second.getValueType())); in getOpndList() 3246 std::deque<std::pair<unsigned, SDValue>> RegsToPass; in LowerCall() local 3270 passByValArg(Chain, DL, RegsToPass, MemOpChains, StackPtr, MFI, DAG, Arg, in LowerCall() [all …]
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| H A D | MipsISelLowering.h | 487 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, 573 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
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| H A D | MipsSEISelLowering.cpp | 1164 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, in getOpndList() argument 1169 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, in getOpndList()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 776 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32() local 867 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Part0)); in LowerCall_32() 871 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Part1)); in LowerCall_32() 902 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32() 906 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32() 931 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_32() 932 Register Reg = toCallerWindow(RegsToPass[i].first); in LowerCall_32() 933 Chain = DAG.getCopyToReg(Chain, dl, Reg, RegsToPass[i].second, InFlag); in LowerCall_32() 956 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall_32() 957 Ops.push_back(DAG.getRegister(toCallerWindow(RegsToPass[i].first), in LowerCall_32() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 652 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local 686 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo() 714 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCCCCallTo() 715 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCCCCallTo() 716 RegsToPass[I].second, InFlag); in LowerCCCCallTo() 747 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCCCCallTo() 748 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCCCCallTo() 749 RegsToPass[I].second.getValueType())); in LowerCCCCallTo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 821 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local 849 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo() 887 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo() 888 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo() 889 RegsToPass[i].second, InFlag); in LowerCCCCallTo() 909 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo() 910 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo() 911 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 414 SmallVector<std::pair<unsigned, SDValue>, MaxArgs> RegsToPass; in LowerCall() local 442 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall() 452 for (auto &Reg : RegsToPass) { in LowerCall() 478 for (auto &Reg : RegsToPass) in LowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1137 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local 1163 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo() 1186 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo() 1187 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo() 1188 RegsToPass[i].second, InFlag); in LowerCCCCallTo() 1211 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo() 1212 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo() 1213 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 582 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local 635 RegsToPass.push_back(std::make_pair(VE::SX12, Callee)); in LowerCall() 675 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall() 702 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall() 703 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, in LowerCall() 704 RegsToPass[i].second, InGlue); in LowerCall() 711 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall() 712 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall() 713 RegsToPass[i].second.getValueType())); in LowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 577 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local 627 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall() 650 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val)); in LowerCall() 717 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall() 718 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, in LowerCall() 719 RegsToPass[i].second, InFlag); in LowerCall() 778 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall() 779 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall() 780 RegsToPass[i].second.getValueType())); in LowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 455 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; in LowerCall() local 519 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall() 544 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall() 545 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall() 546 RegsToPass[i].second, Glue); in LowerCall() 561 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall() 562 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall() 563 RegsToPass[i].second, Glue); in LowerCall() 590 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall() 591 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 5410 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, in buildCallOperands() argument 5462 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in buildCallOperands() 5463 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in buildCallOperands() 5464 RegsToPass[i].second.getValueType())); in buildCallOperands() 5491 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue, in FinishCall() argument 5514 buildCallOperands(Ops, CFlags, dl, DAG, RegsToPass, Glue, Chain, Callee, in FinishCall() 5747 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32SVR4() local 5814 RegsToPass.push_back(std::make_pair(VA.getLocReg(), SVal.getValue(0))); in LowerCall_32SVR4() 5817 RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(), in LowerCall_32SVR4() 5820 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32SVR4() [all …]
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| H A D | PPCISelLowering.h | 1243 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1274 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local 1313 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall() 1344 for (auto Reg : RegsToPass) { in LowerCall() 1357 for (auto Reg : RegsToPass) { in LowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.h | 340 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
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| H A D | SIISelLowering.cpp | 2685 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass, in passSpecialInputs() argument 2751 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs() 2821 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs() 3006 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local 3017 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain); in LowerCall() 3050 RegsToPass.emplace_back(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3, ScratchRSrcReg); in LowerCall() 3087 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall() 3154 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain); in LowerCall() 3163 for (auto &RegToPass : RegsToPass) { in LowerCall() 3220 for (auto &RegToPass : RegsToPass) { in LowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 752 SDValue &Arg, RegsToPassVector &RegsToPass,
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| H A D | ARMISelLowering.cpp | 2198 RegsToPassVector &RegsToPass, in PassF64ArgInRegs() argument 2206 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id))); in PassF64ArgInRegs() 2209 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id))); in PassF64ArgInRegs() 2312 RegsToPassVector RegsToPass; in LowerCall() local 2371 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i], in LowerCall() 2376 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, VA, ArgLocs[++i], in LowerCall() 2385 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], in LowerCall() 2399 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall() 2424 RegsToPass.push_back(std::make_pair(j, Load)); in LowerCall() 2465 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1579 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass; in LowerCall() local 1626 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall() 1667 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCall() 1668 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCall() 1669 RegsToPass[I].second, Glue); in LowerCall() 1680 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCall() 1681 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCall() 1682 RegsToPass[I].second.getValueType())); in LowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 7508 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall() local 7526 RegsToPass.push_back(std::make_pair(RegLo, Lo)); in LowerCall() 7540 RegsToPass.push_back(std::make_pair(RegHigh, Hi)); in LowerCall() 7602 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall() 7628 for (auto &Reg : RegsToPass) { in LowerCall() 7636 validateCCReservedRegs(RegsToPass, MF); in LowerCall() 7671 for (auto &Reg : RegsToPass) in LowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 5627 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local 5636 RegsToPass.emplace_back(F.PReg, Val); in LowerCall() 5747 llvm::find_if(RegsToPass, in LowerCall() 5760 RegsToPass.emplace_back(VA.getLocReg(), Arg); in LowerCall() 5842 for (auto &RegToPass : RegsToPass) { in LowerCall() 5897 for (auto &RegToPass : RegsToPass) in LowerCall()
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