Searched refs:OpMask (Results 1 – 4 of 4) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | AsmMatcherEmitter.cpp | 1457 unsigned OpMask = OCM.second; in buildOperandMatchInfo() local
1460 OpMask)); in buildOperandMatchInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 36724 SmallVector<int, 64> OpMask; in combineX86ShufflesRecursively() local
36729 if (!getTargetShuffleInputs(Op, OpDemandedElts, OpInputs, OpMask, OpUndef, in combineX86ShufflesRecursively()
36744 unsigned OpMaskSize = OpMask.size(); in combineX86ShufflesRecursively()
36747 for (int &M : OpMask) { in combineX86ShufflesRecursively()
36757 OpMask.append((NumSubVecs - 1) * OpMaskSize, SM_SentinelUndef); in combineX86ShufflesRecursively()
36771 for (int i = 0, e = OpMask.size(); i != e; ++i) { in combineX86ShufflesRecursively()
36772 int M = OpMask[i]; in combineX86ShufflesRecursively()
36775 UsedInputs.setBit(M / OpMask.size()); in combineX86ShufflesRecursively()
36782 resolveTargetShuffleFromZeroables(OpMask, OpUndef, OpZero, in combineX86ShufflesRecursively()
36785 Mask = OpMask; in combineX86ShufflesRecursively()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5615 APInt OpMask = APInt::getLowBitsSet(Op0.getValueSizeInBits(), 32); in PerformDAGCombine() local
5617 if (SimplifyDemandedBits(Op0, OpMask, DCI) || in PerformDAGCombine()
5618 SimplifyDemandedBits(Op1, OpMask, DCI) || in PerformDAGCombine()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 14527 ArrayRef<int> OpMask = Op0->getMask(); in FlattenVectorShuffle() local
14529 if (NMask[i] > 0 && OpMask[NMask[i]] > 0 && OpMask[NMask[i]] != i) in FlattenVectorShuffle()
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