| /netbsd-src/external/apache2/llvm/dist/clang/lib/AST/Interp/ |
| H A D | Pointer.h | 107 const unsigned NewBase = Base + sizeof(InlineDescriptor); in narrow() local
108 return Pointer(Pointee, NewBase, NewBase); in narrow()
157 unsigned NewBase = Base - getInlineDesc()->Offset; in getBase() local
158 return Pointer(Pointee, NewBase, NewBase); in getBase()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCOptAddrMode.cpp | 101 unsigned NewBase, MachineOperand &NewOffset);
364 unsigned NewBase, int64_t NewOffset) { in fixPastUses() argument
384 MI->getOperand(BasePos).setReg(NewBase); in fixPastUses()
442 unsigned NewBase, in changeToAddrMode() argument
460 Ldst.addOperand(MachineOperand::CreateReg(NewBase, true)); in changeToAddrMode()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 681 unsigned NewBase; in CreateLoadStoreMulti() local
685 NewBase = Regs[NumRegs-1].first; in CreateLoadStoreMulti()
696 NewBase = findFreeReg(isThumb1 ? ARM::tGPRRegClass : ARM::GPRRegClass); in CreateLoadStoreMulti()
697 if (NewBase == 0) in CreateLoadStoreMulti()
735 if (Base != NewBase && in CreateLoadStoreMulti()
738 if (isARMLowRegister(NewBase) && isARMLowRegister(Base) && in CreateLoadStoreMulti()
743 BuildMI(MBB, InsertBefore, DL, TII->get(ARM::tMOVSr), NewBase) in CreateLoadStoreMulti()
746 BuildMI(MBB, InsertBefore, DL, TII->get(ARM::tMOVr), NewBase) in CreateLoadStoreMulti()
751 Base = NewBase; in CreateLoadStoreMulti()
756 BuildMI(MBB, InsertBefore, DL, TII->get(BaseOpc), NewBase) in CreateLoadStoreMulti()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | GuardWidening.cpp | 205 void setBase(const Value *NewBase) { Base = NewBase; } in setBase() argument
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| H A D | SeparateConstOffsetFromGEP.cpp | 1361 Value *NewBase = in swapGEPOperand() local
1364 if (!getObjectSize(NewBase, ObjectSize, DAL, TLI) || in swapGEPOperand()
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| H A D | LoopStrengthReduce.cpp | 3704 Formula NewBase = Base; in GenerateCombinations() local
3705 NewBase.BaseRegs.clear(); in GenerateCombinations()
3715 NewBase.BaseRegs.push_back(BaseReg); in GenerateCombinations()
3725 Formula F = NewBase; in GenerateCombinations()
3746 if (NewBase.UnfoldedOffset) { in GenerateCombinations()
3748 Ops.push_back(SE.getConstant(CombinedIntegerType, NewBase.UnfoldedOffset, in GenerateCombinations()
3750 NewBase.UnfoldedOffset = 0; in GenerateCombinations()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 925 unsigned BasePos = 0, OffsetPos = 0, NewBase = 0; in changeDependences() local
927 if (!canUseLastOffsetValue(I.getInstr(), BasePos, OffsetPos, NewBase, in changeDependences()
940 MachineInstr *LastMI = MRI.getUniqueVRegDef(NewBase); in changeDependences()
971 SDep Dep(&I, SDep::Anti, NewBase); in changeDependences()
977 InstrChanges[&I] = std::make_pair(NewBase, NewOffset); in changeDependences()
2170 unsigned &NewBase, in canUseLastOffsetValue() argument
2216 NewBase = PrevReg; in canUseLastOffsetValue()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachinePipeliner.h | 300 unsigned &OffsetPos, unsigned &NewBase,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfDebug.cpp | 2695 const MCSymbol *NewBase = DD.getSectionLabel(&Begin->getSection()); in emitRangeList() local
2697 Base = NewBase; in emitRangeList()
2702 } else if (NewBase != Begin || P.second.size() > 1) { in emitRangeList()
2706 Base = NewBase; in emitRangeList()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SILoadStoreOptimizer.cpp | 235 void updateBaseAndOffset(MachineInstr &I, Register NewBase,
1734 Register NewBase, in updateBaseAndOffset() argument
1737 Base->setReg(NewBase); in updateBaseAndOffset()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/ |
| H A D | SemaPseudoObject.cpp | 97 auto *NewBase = rebuild(refExpr->getBase()); in rebuildMSPropertySubscriptExpr() local
100 NewBase, in rebuildMSPropertySubscriptExpr()
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| H A D | TreeTransform.h | 6171 QualType NewBase = in TransformUnaryTransformType() local
6173 Result = getDerived().RebuildUnaryTransformType(NewBase, in TransformUnaryTransformType()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1439 SDValue NewBase = OldBase; in findAddrModeSVELoadStore() local
1443 N, OldBase, NewBase, NewOffset); in findAddrModeSVELoadStore()
1448 !IsRegImm && SelectSVERegRegAddrMode(OldBase, Scale, NewBase, NewOffset); in findAddrModeSVELoadStore()
1451 return std::make_tuple(IsRegReg ? Opc_rr : Opc_ri, NewBase, NewOffset); in findAddrModeSVELoadStore()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 702 Value *NewBase = Base; in rewriteGEPAsOffset() local
704 NewBase = Builder.CreateBitOrPointerCast(Base, Start->getType(), in rewriteGEPAsOffset()
708 Start->getType()->getPointerElementType(), NewBase, in rewriteGEPAsOffset()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 17688 llvm::Value *NewBase = IsLoad ? Builder.CreateExtractValue(Result, 1) in EmitHexagonBuiltinExpr() local
17691 EmitScalarExpr(E->getArg(0)), NewBase->getType()->getPointerTo()); in EmitHexagonBuiltinExpr()
17694 Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment()); in EmitHexagonBuiltinExpr()
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