| /openbsd-src/sys/dev/pci/drm/amd/display/dc/link/accessories/ |
| H A D | link_fpga.c | 62 if ((stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) && (state->stream_count > 1)) { in dp_fpga_hpo_enable_link_and_stream()
66 proposed_table.stream_count = state->stream_count; in dp_fpga_hpo_enable_link_and_stream()
67 for (i = 0; i < state->stream_count; i++) { in dp_fpga_hpo_enable_link_and_stream()
79 proposed_table.stream_count = 1; /// Always 1 stream for SST in dp_fpga_hpo_enable_link_and_stream()
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/core/ |
| H A D | dc_link_enc_cfg.c | 87 for (i = 0; i < state->stream_count; i++) { in get_stream_using_link_enc()
148 for (i = 0; i < state->stream_count; i++) { in add_link_enc_assignment()
165 ASSERT(i != state->stream_count); in add_link_enc_assignment()
300 uint8_t stream_count) in link_enc_cfg_link_encs_assign() argument
306 ASSERT(state->stream_count == stream_count); in link_enc_cfg_link_encs_assign()
310 for (i = 0; i < dc->current_state->stream_count; i++) in link_enc_cfg_link_encs_assign()
317 for (i = 0; i < stream_count; i++) { in link_enc_cfg_link_encs_assign()
339 for (i = 0; i < stream_count; i++) { in link_enc_cfg_link_encs_assign()
350 for (j = 0; j < prev_state->stream_count; j++) { in link_enc_cfg_link_encs_assign()
367 for (i = 0; i < stream_count; i++) { in link_enc_cfg_link_encs_assign()
[all …]
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| H A D | amdgpu_dc.c | 174 for (i = 0; i < ctx->stream_count; i++) in get_seamless_boot_stream_count()
1127 for (j = 0; j < context->stream_count; j++) { in disable_dangling_plane()
1134 dc->current_state->stream_count != context->stream_count) in disable_dangling_plane()
1556 uint8_t stream_count) in streams_changed()
1560 if (stream_count != dc->current_state->stream_count) in streams_changed()
1563 for (i = 0; i < dc->current_state->stream_count; i++) { in streams_changed()
1745 uint8_t stream_count) in dc_enable_stereo()
1758 for (j = 0; pipe && j < stream_count; in dc_enable_stereo()
1555 streams_changed(struct dc * dc,struct dc_stream_state * streams[],uint8_t stream_count) streams_changed() argument
1744 dc_enable_stereo(struct dc * dc,struct dc_state * context,struct dc_stream_state * streams[],uint8_t stream_count) dc_enable_stereo() argument
2009 dc_commit_streams(struct dc * dc,struct dc_stream_state * streams[],uint8_t stream_count) dc_commit_streams() argument
[all...] |
| H A D | dc_stream.c | 228 for (i = 0; i < state->stream_count; i++) { in dc_stream_get_status_from_state()
327 (dc->current_state->stream_count > 1 || in is_subvp_high_refresh_candidate()
328 (dc->current_state->stream_count == 1 && !stream->allow_freesync))) in is_subvp_high_refresh_candidate()
369 if (dc->current_state->stream_count == 1 && stream->timing.v_addressable >= 2880 && in dc_stream_set_cursor_attributes()
372 else if (dc->current_state->stream_count > 1 && stream->timing.v_addressable >= 2160 && in dc_stream_set_cursor_attributes()
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| H A D | dc_resource.c | 1961 for (i = 0; i < context->stream_count; i++) in dc_remove_plane_from_context()
2042 for (i = 0; i < context->stream_count; i++) in dc_rem_all_planes_for_stream()
2428 if (new_ctx->stream_count >= dc->res_pool->timing_generator_count) { in dc_add_stream_to_ctx()
2433 new_ctx->streams[new_ctx->stream_count] = stream; in dc_add_stream_to_ctx()
2435 new_ctx->stream_count++; in dc_add_stream_to_ctx()
2502 for (i = 0; i < new_ctx->stream_count; i++) in dc_remove_stream_from_ctx()
2512 new_ctx->stream_count--; in dc_remove_stream_from_ctx()
2515 for (; i < new_ctx->stream_count; i++) { in dc_remove_stream_from_ctx()
2520 new_ctx->streams[new_ctx->stream_count] = NULL; in dc_remove_stream_from_ctx()
2522 &new_ctx->stream_status[new_ctx->stream_count], in dc_remove_stream_from_ctx()
[all...] |
| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource_helpers.c | 203 for (i = 0; i < context->stream_count; i++) { in dcn32_mpo_in_use()
291 uint8_t stream_count = 0; in dcn32_determine_det_override() local
293 for (i = 0; i < context->stream_count; i++) { in dcn32_determine_det_override()
296 stream_count++; in dcn32_determine_det_override()
299 if (stream_count > 0) { in dcn32_determine_det_override()
300 stream_segments = 18 / stream_count; in dcn32_determine_det_override()
301 for (i = 0; i < context->stream_count; i++) { in dcn32_determine_det_override()
569 if (context->stream_count > 2) in dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch()
571 else if (context->stream_count == 2) { in dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch()
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| H A D | dcn32_hwseq.c | 199 for (i = 0; i < dc->current_state->stream_count; i++) { in dcn32_check_no_memory_request_for_cab()
206 if (i == dc->current_state->stream_count) in dcn32_check_no_memory_request_for_cab()
259 for (i = 0; i < dc->current_state->stream_count; i++) { in dcn32_apply_idle_power_optimizations()
293 for (i = 0; i < dc->current_state->stream_count; i++) { in dcn32_apply_idle_power_optimizations()
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 1188 ASSERT(proposed_table->stream_count - in update_mst_stream_alloc_table()
1189 link->mst_stream_alloc_table.stream_count < 2); in update_mst_stream_alloc_table()
1192 for (i = 0; i < proposed_table->stream_count; i++) { in update_mst_stream_alloc_table()
1194 for (j = 0; j < link->mst_stream_alloc_table.stream_count; j++) { in update_mst_stream_alloc_table()
1208 if (j == link->mst_stream_alloc_table.stream_count) { in update_mst_stream_alloc_table()
1219 link->mst_stream_alloc_table.stream_count = in update_mst_stream_alloc_table()
1220 proposed_table->stream_count; in update_mst_stream_alloc_table()
1236 for (; i < table->stream_count; i++) in remove_stream_from_alloc_table()
1240 for (; i < table->stream_count; i++) in remove_stream_from_alloc_table()
1245 if (i < table->stream_count) { in remove_stream_from_alloc_table()
[all …]
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/ |
| H A D | dce110_clk_mgr.c | 97 for (j = 0; j < context->stream_count; j++) { in dce110_get_min_vblank_time_us()
126 for (j = 0; j < context->stream_count; j++) { in dce110_fill_display_configs()
199 ASICREV_IS_VEGA20_P(dc->ctx->asic_id.hw_internal_rev) && (context->stream_count >= 2)) { in dce11_pplib_apply_display_requirements()
220 pp_display_cfg->min_dcfclock_khz = (context->stream_count > 4) ? in dce11_pplib_apply_display_requirements()
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| /openbsd-src/sys/dev/pci/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_mst_types.c | 1094 for (i = 0; i < dc_state->stream_count; i++) { in compute_mst_dsc_configs_for_link()
1230 for (i = 0; i < dc_state->stream_count; i++) { in is_dsc_need_re_compute()
1279 for (i = 0; i < dc->current_state->stream_count; i++) { in is_dsc_need_re_compute()
1319 for (i = 0; i < dc_state->stream_count; i++) in compute_mst_dsc_configs_for_state()
1322 for (i = 0; i < dc_state->stream_count; i++) { in compute_mst_dsc_configs_for_state()
1353 for (j = 0; j < dc_state->stream_count; j++) { in compute_mst_dsc_configs_for_state()
1359 for (i = 0; i < dc_state->stream_count; i++) { in compute_mst_dsc_configs_for_state()
1382 for (i = 0; i < dc_state->stream_count; i++) in pre_compute_mst_dsc_configs_for_state()
1385 for (i = 0; i < dc_state->stream_count; i++) { in pre_compute_mst_dsc_configs_for_state()
1411 for (j = 0; j < dc_state->stream_count; in pre_compute_mst_dsc_configs_for_state()
[all...] |
| H A D | amdgpu_dm_helpers.c | 174 int current_hw_table_stream_cnt = copy_of_link_table.stream_count; in fill_dc_mst_payload_table_from_drm()
184 for (i = 0; i < copy_of_link_table.stream_count; i++) { in fill_dc_mst_payload_table_from_drm()
194 ASSERT(i != copy_of_link_table.stream_count); in fill_dc_mst_payload_table_from_drm()
202 sa = &new_table.stream_allocations[new_table.stream_count]; in fill_dc_mst_payload_table_from_drm()
205 new_table.stream_count++; in fill_dc_mst_payload_table_from_drm()
236 for (i = 0; i < current_link_table.stream_count; i++) { in dm_helpers_construct_old_payload()
248 ASSERT(i != current_link_table.stream_count);
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_hpo_dp_link_encoder.c | 298 if (table->stream_count >= 1) { in dcn31_hpo_dp_link_enc_update_stream_allocation_table()
312 if (table->stream_count >= 2) { in dcn31_hpo_dp_link_enc_update_stream_allocation_table()
326 if (table->stream_count >= 3) { in dcn31_hpo_dp_link_enc_update_stream_allocation_table()
340 if (table->stream_count >= 4) { in dcn31_hpo_dp_link_enc_update_stream_allocation_table()
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/inc/ |
| H A D | link_enc_cfg.h | 61 uint8_t stream_count);
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| H A D | core_types.h | 114 uint8_t stream_count);
504 uint8_t stream_count; member
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/link/hwss/ |
| H A D | link_hwss_dpia.c | 42 for (i = 0; i < table->stream_count; i++) in update_dpia_stream_allocation_table()
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/clk_mgr/ |
| H A D | clk_mgr.c | 59 for (i = 0; i < context->stream_count; i++) { in clk_mgr_helper_get_active_display_cnt()
88 for (i = 0; i < context->stream_count; i++) { in clk_mgr_helper_get_active_plane_cnt()
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| /openbsd-src/sys/dev/pci/drm/amd/display/include/ |
| H A D | link_service_types.h | 248 int stream_count; member
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dce60/ |
| H A D | dce60_hw_sequencer.c | 67 if (context->stream_count != 1) in dce60_should_enable_fbc()
407 context->stream_count); in dce60_apply_ctx_for_surface()
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_link_encoder.c | 1238 if (table->stream_count >= 1) { in dcn10_link_encoder_update_mst_stream_allocation_table()
1252 if (table->stream_count >= 2) { in dcn10_link_encoder_update_mst_stream_allocation_table()
1266 if (table->stream_count >= 3) { in dcn10_link_encoder_update_mst_stream_allocation_table()
1280 if (table->stream_count >= 4) { in dcn10_link_encoder_update_mst_stream_allocation_table()
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dml/dcn314/ |
| H A D | dcn314_fpu.c | 405 } else if (context->stream_count >= dc->debug.crb_alloc_policy_min_disp_count in dcn314_populate_dml_pipes_from_context_fpu()
408 } else if (context->stream_count >= 3 && upscaled) { in dcn314_populate_dml_pipes_from_context_fpu()
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dce/ |
| H A D | dce_clk_mgr.c | 502 for (j = 0; j < context->stream_count; j++) { in dce110_fill_display_configs()
553 for (j = 0; j < context->stream_count; j++) { in dce110_get_min_vblank_time_us()
643 pp_display_cfg->min_dcfclock_khz = (context->stream_count > 4) ? in dce11_pplib_apply_display_requirements()
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| H A D | dce_link_encoder.c | 1517 if (table->stream_count >= 1) { in dce110_link_encoder_update_mst_stream_allocation_table()
1531 if (table->stream_count >= 2) { in dce110_link_encoder_update_mst_stream_allocation_table()
1545 if (table->stream_count >= 3) { in dce110_link_encoder_update_mst_stream_allocation_table()
1559 if (table->stream_count >= 4) { in dce110_link_encoder_update_mst_stream_allocation_table()
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_hwseq.c | 379 for (i_stream = 0; i_stream < context->stream_count; i_stream++) { in dcn30_program_all_writeback_pipes_in_tree()
718 for (i = 0; i < dc->current_state->stream_count; i++) { in dcn30_apply_idle_power_optimizations()
724 if (i == dc->current_state->stream_count) { in dcn30_apply_idle_power_optimizations()
757 if (dc->current_state->stream_count == 1 && in dcn30_apply_idle_power_optimizations()
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/ |
| H A D | dc_stream.h | 493 uint8_t stream_count);
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dce110/ |
| H A D | dce110_hw_sequencer.c | 1698 for (i = 0; i < context->stream_count; i++) { in get_edp_streams()
1788 for (i = 0; i < context->stream_count; i++) { in dce110_enable_accelerated_mode()
1998 if (context->stream_count != 1) in should_enable_fbc()
2131 pipe_ctx_old->plane_res.mi, dc->current_state->stream_count); in dce110_reset_hw_ctx_wrap()
2254 if (context->stream_count <= 0) in dce110_apply_ctx_to_hw()
2825 context->stream_count); in dce110_apply_ctx_for_surface()
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