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Searched refs:setTargetDAGCombine (Results 1 – 21 of 21) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp161 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in WebAssemblyTargetLowering()
164 setTargetDAGCombine({ISD::SIGN_EXTEND, ISD::ZERO_EXTEND}); in WebAssemblyTargetLowering()
168 setTargetDAGCombine({ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::FP_EXTEND, in WebAssemblyTargetLowering()
173 setTargetDAGCombine({ISD::FP_TO_SINT_SAT, ISD::FP_TO_UINT_SAT, in WebAssemblyTargetLowering()
176 setTargetDAGCombine(ISD::TRUNCATE); in WebAssemblyTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp201 setTargetDAGCombine(ISD::AND); in LoongArchTargetLowering()
202 setTargetDAGCombine(ISD::OR); in LoongArchTargetLowering()
203 setTargetDAGCombine(ISD::SRL); in LoongArchTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVEISelLowering.cpp916 setTargetDAGCombine(ISD::TRUNCATE); in VETargetLowering()
917 setTargetDAGCombine(ISD::SELECT); in VETargetLowering()
918 setTargetDAGCombine(ISD::SELECT_CC); in VETargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp102 setTargetDAGCombine( in MipsSETargetLowering()
161 setTargetDAGCombine({ISD::AND, ISD::OR, ISD::SRA, ISD::VSELECT, ISD::XOR}); in MipsSETargetLowering()
204 setTargetDAGCombine(ISD::MUL); in MipsSETargetLowering()
H A DMipsISelLowering.cpp483 setTargetDAGCombine({ISD::SDIVREM, ISD::UDIVREM, ISD::SELECT, ISD::AND, in MipsTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1814 setTargetDAGCombine(ISD::OR); in HexagonTargetLowering()
1815 setTargetDAGCombine(ISD::TRUNCATE); in HexagonTargetLowering()
1816 setTargetDAGCombine(ISD::VSELECT); in HexagonTargetLowering()
H A DHexagonISelLoweringHVX.cpp438 setTargetDAGCombine({ISD::CONCAT_VECTORS, ISD::TRUNCATE, ISD::VSELECT}); in initializeHVXLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1007 setTargetDAGCombine({ISD::INTRINSIC_WO_CHAIN, ISD::ADD, ISD::SUB, ISD::AND, in RISCVTargetLowering()
1010 setTargetDAGCombine(ISD::SRA); in RISCVTargetLowering()
1013 setTargetDAGCombine({ISD::FADD, ISD::FMAXNUM, ISD::FMINNUM}); in RISCVTargetLowering()
1016 setTargetDAGCombine({ISD::UMAX, ISD::UMIN, ISD::SMAX, ISD::SMIN}); in RISCVTargetLowering()
1019 setTargetDAGCombine(ISD::TRUNCATE); in RISCVTargetLowering()
1022 setTargetDAGCombine(ISD::BITREVERSE); in RISCVTargetLowering()
1024 setTargetDAGCombine(ISD::SIGN_EXTEND_INREG); in RISCVTargetLowering()
1026 setTargetDAGCombine({ISD::ZERO_EXTEND, ISD::FP_TO_SINT, ISD::FP_TO_UINT, in RISCVTargetLowering()
1029 setTargetDAGCombine({ISD::FCOPYSIGN, ISD::MGATHER, ISD::MSCATTER, in RISCVTargetLowering()
1033 setTargetDAGCombine(ISD::BITCAST); in RISCVTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp933 setTargetDAGCombine(ISD::OR); in AArch64TargetLowering()
935 setTargetDAGCombine(ISD::AND); in AArch64TargetLowering()
939 setTargetDAGCombine({ISD::ADD, ISD::ABS, ISD::SUB, ISD::XOR, ISD::SINT_TO_FP, in AArch64TargetLowering()
942 setTargetDAGCombine({ISD::FP_TO_SINT, ISD::FP_TO_UINT, ISD::FP_TO_SINT_SAT, in AArch64TargetLowering()
946 setTargetDAGCombine(ISD::SETCC); in AArch64TargetLowering()
948 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in AArch64TargetLowering()
950 setTargetDAGCombine({ISD::ANY_EXTEND, ISD::ZERO_EXTEND, ISD::SIGN_EXTEND, in AArch64TargetLowering()
954 setTargetDAGCombine(ISD::TRUNCATE); in AArch64TargetLowering()
955 setTargetDAGCombine(ISD::LOAD); in AArch64TargetLowering()
957 setTargetDAGCombine(ISD::MSTORE); in AArch64TargetLowering()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp141 setTargetDAGCombine({ISD::ADD, ISD::SUB, ISD::AND, ISD::OR, ISD::XOR}); in LanaiTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp1370 setTargetDAGCombine({ISD::ADD, ISD::SHL, ISD::SRA, ISD::SRL, ISD::MUL, in PPCTargetLowering()
1373 setTargetDAGCombine(ISD::UINT_TO_FP); in PPCTargetLowering()
1374 setTargetDAGCombine({ISD::LOAD, ISD::STORE, ISD::BR_CC}); in PPCTargetLowering()
1376 setTargetDAGCombine(ISD::BRCOND); in PPCTargetLowering()
1377 setTargetDAGCombine({ISD::BSWAP, ISD::INTRINSIC_WO_CHAIN, in PPCTargetLowering()
1380 setTargetDAGCombine({ISD::SIGN_EXTEND, ISD::ZERO_EXTEND, ISD::ANY_EXTEND}); in PPCTargetLowering()
1382 setTargetDAGCombine({ISD::TRUNCATE, ISD::VECTOR_SHUFFLE}); in PPCTargetLowering()
1385 setTargetDAGCombine({ISD::TRUNCATE, ISD::SETCC, ISD::SELECT_CC}); in PPCTargetLowering()
1389 setTargetDAGCombine({ISD::ABS, ISD::VSELECT}); in PPCTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp826 setTargetDAGCombine({ISD::BRCOND, ISD::BR_CC}); in ARMTargetLowering()
998 setTargetDAGCombine({ISD::SHL, ISD::SRL, ISD::SRA, ISD::FP_TO_SINT, in ARMTargetLowering()
1013 setTargetDAGCombine( in ARMTargetLowering()
1021 setTargetDAGCombine({ISD::SMIN, ISD::UMIN, ISD::SMAX, ISD::UMAX, in ARMTargetLowering()
1026 setTargetDAGCombine(ISD::FADD); in ARMTargetLowering()
1567 setTargetDAGCombine( in ARMTargetLowering()
1571 setTargetDAGCombine(ISD::VSELECT); in ARMTargetLowering()
1574 setTargetDAGCombine(ISD::SRL); in ARMTargetLowering()
1576 setTargetDAGCombine(ISD::SHL); in ARMTargetLowering()
1580 setTargetDAGCombine({ISD::SMIN, ISD::SMAX}); in ARMTargetLowering()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp563 setTargetDAGCombine({ISD::ADD, ISD::AND, ISD::FADD, ISD::MUL, ISD::SHL, in NVPTXTargetLowering()
569 setTargetDAGCombine(ISD::SETCC); in NVPTXTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp201 setTargetDAGCombine({ISD::FP_ROUND, ISD::FP_TO_SINT, ISD::EXTRACT_VECTOR_ELT, in R600TargetLowering()
H A DAMDGPUISelLowering.cpp531 setTargetDAGCombine({ISD::BITCAST, ISD::SHL, in AMDGPUTargetLowering()
H A DSIISelLowering.cpp746 setTargetDAGCombine({ISD::ADD, in SITargetLowering()
776 setTargetDAGCombine({ISD::LOAD, in SITargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp169 setTargetDAGCombine( in XCoreTargetLowering()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2508 void setTargetDAGCombine(ArrayRef<ISD::NodeType> NTs) { in setTargetDAGCombine() function
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1949 setTargetDAGCombine(ISD::BITCAST); in SparcTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp649 setTargetDAGCombine({ISD::ZERO_EXTEND, in SystemZTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2359 setTargetDAGCombine({ISD::VECTOR_SHUFFLE, in X86TargetLowering()