| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | R600ClauseMergePass.cpp | 103 CFAlu.getOperand(CntIdx).setImm(getCFAluSize(CFAlu) + getCFAluSize(MI)); in cleanPotentialDisabledCFAlu() 154 RootCFAlu.getOperand(Mode0Idx).setImm( in mergeIfPossible() 156 RootCFAlu.getOperand(KBank0Idx).setImm( in mergeIfPossible() 159 .setImm(LatrCFAlu.getOperand(KBank0LineIdx).getImm()); in mergeIfPossible() 162 RootCFAlu.getOperand(Mode1Idx).setImm( in mergeIfPossible() 164 RootCFAlu.getOperand(KBank1Idx).setImm( in mergeIfPossible() 167 .setImm(LatrCFAlu.getOperand(KBank1LineIdx).getImm()); in mergeIfPossible() 169 RootCFAlu.getOperand(CntIdx).setImm(CumuledInsts); in mergeIfPossible()
|
| H A D | R600InstrInfo.cpp | 746 PredSet->getOperand(2).setImm(Cond[1].getImm()); in insertBranch() 762 PredSet->getOperand(2).setImm(Cond[1].getImm()); in insertBranch() 910 MO.setImm(R600::PRED_SETNE_INT); in reverseBranchCondition() 913 MO.setImm(R600::PRED_SETE_INT); in reverseBranchCondition() 916 MO.setImm(R600::PRED_SETNE); in reverseBranchCondition() 919 MO.setImm(R600::PRED_SETE); in reverseBranchCondition() 950 MI.getOperand(8).setImm(0); in PredicateInstruction() 1334 MIB->getOperand(20).setImm(0); in buildSlotOfVectorInstruction() 1367 MI.getOperand(Idx).setImm(Imm); in setImmOperand() 1452 FlagOp.setImm(1); in addFlag() [all …]
|
| H A D | R600Packetizer.cpp | 218 MI->getOperand(LastOp).setImm(Bit); in setIsLastBit() 299 MI->getOperand(Op).setImm(BS[i]); in addToPacket() 303 MI.getOperand(Op).setImm(BS.back()); in addToPacket()
|
| H A D | R600ControlFlowFinalizer.cpp | 434 ClauseHead.getOperand(7).setImm(ClauseContent.size() - 1); in MakeALUClause() 451 Clause.first->getOperand(0).setImm(0); in EmitALUClause() 461 MI.getOperand(0).setImm(Addr + MI.getOperand(0).getImm()); in CounterPropagateAddr() 605 IfOrElseInst->getOperand(1).setImm(1); in runOnMachineFunction()
|
| H A D | SIPeepholeSDWA.cpp | 407 SrcSel->setImm(getSrcSel()); in convertToSDWA() 408 SrcMods->setImm(getSrcMods(TII, Src)); in convertToSDWA() 452 DstSel->setImm(getDstSel()); in convertToSDWA() 455 DstUnused->setImm(getDstUnused()); in convertToSDWA()
|
| H A D | SIShrinkInstructions.cpp | 543 SrcImm->setImm(NewImm); in shrinkScalarLogicOp() 801 Src.setImm(ReverseImm); in runOnMachineFunction() 864 Src.setImm(ReverseImm); in runOnMachineFunction()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 82 MI.getOperand(OffsetOperandNum).setImm(Offset); in eliminateFrameIndex() 105 ImmMO.setImm(ImmMO.getImm() + uint32_t(FrameOffset)); in eliminateFrameIndex()
|
| H A D | WebAssemblySetP2AlignOperands.cpp | 74 MI.getOperand(OperandNo).setImm(P2Align); in rewriteP2Align()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86EvexToVex.cpp | 164 Imm.setImm(Imm.getImm() * Scale); in performCustomAdjustments() 181 Imm.setImm(0x20 | ((ImmVal & 2) << 3) | (ImmVal & 1)); in performCustomAdjustments()
|
| H A D | X86InstrInfo.h | 173 I.getOperand(2).setImm(V); in setFrameAdjustment() 175 I.getOperand(1).setImm(V); in setFrameAdjustment()
|
| H A D | X86InstrBuilder.h | 136 MI->getOperand(Operand + 1).setImm(1); in setDirectAddressInInstr()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64StackTaggingPreRA.cpp | 330 TagOp.setImm(0); in findFirstSlotCandidate() 332 TagOp.setImm(MaxScoreST.Tag); in findFirstSlotCandidate()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 609 MI.getOperand(3).setImm(3 - Immed); in simplifyCode() 709 MI.getOperand(2).setImm(NewElem); in simplifyCode() 1549 BI1->getOperand(0).setImm(NewPredicate1); in eliminateRedundantCompare() 1552 BI2->getOperand(0).setImm(NewPredicate2); in eliminateRedundantCompare() 1555 CMPI1->getOperand(2).setImm(NewImm1); in eliminateRedundantCompare() 1568 CMPI2->getOperand(2).setImm(NewImm2); in eliminateRedundantCompare() 1665 MI.getOperand(2).setImm(NewSH); in emitRLDICWhenLoweringJumpTables() 1666 MI.getOperand(3).setImm(NewMB); in emitRLDICWhenLoweringJumpTables()
|
| H A D | PPCVSXSwapRemoval.cpp | 872 MI->getOperand(2).setImm(EltNo); in handleSpecialSwappables() 874 MI->getOperand(1).setImm(EltNo); in handleSpecialSwappables() 896 MI->getOperand(3).setImm(Selector); in handleSpecialSwappables()
|
| H A D | PPCInstrInfo.cpp | 1218 MI.getOperand(4).setImm((ME + 1) & 31); in commuteInstructionImpl() 1219 MI.getOperand(5).setImm((MB - 1) & 31); in commuteInstructionImpl() 2053 Cond[0].setImm(Cond[0].getImm() == 0 ? 1 : 0); in reverseBranchCondition() 2056 Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); in reverseBranchCondition() 2546 UseMI->getOperand(0).setImm(Pred); in optimizeCompareInstr() 2547 CmpInstr.getOperand(2).setImm(0); in optimizeCompareInstr() 2726 MI->getOperand(2).setImm(Mask); in optimizeCompareInstr() 2735 MI->getOperand(2).setImm(Mask); in optimizeCompareInstr() 2763 PredsToUpdate[i].first->setImm(PredsToUpdate[i].second); in optimizeCompareInstr() 3666 ADDIMI->getOperand(2).setImm(OffsetAddi + OffsetImm); in foldFrameOffset() [all …]
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZShortenInst.cpp | 103 MI.getOperand(1).setImm(Imm >> 16); in shortenIIF() 373 ImmMO.setImm(ImmMO.getImm() & 0xfff); in processBlock()
|
| H A D | SystemZInstrInfo.cpp | 101 LowOffsetOp.setImm(LowOffsetOp.getImm() + 8); in splitMove() 133 OffsetMO.setImm(Offset); in splitAdjDynAlloc() 149 MI.getOperand(1).setImm(uint32_t(MI.getOperand(1).getImm())); in expandRIPseudo() 300 WorkingMI.getOperand(4).setImm(CCMask ^ CCValid); in commuteInstructionImpl() 477 Cond[1].setImm(Cond[1].getImm() ^ Cond[0].getImm()); in reverseBranchCondition() 1504 MI.getOperand(5).setImm(MI.getOperand(5).getImm() ^ 32); in expandPostRAPseudo() 1894 CCMaskMO.setImm(NewCCMask); in prepareCompareSwapOperands()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMMCInstLower.cpp | 161 MCOp.setImm(Enc); in LowerARMMachineInstrToMCInst()
|
| H A D | MVEVPTBlockPass.cpp | 230 Iter->getOperand(OpIdx).setImm(CurrentPredicate); in CreateVPTBlock()
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCInst.h | 85 void setImm(int64_t Val) { in setImm() function
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/BPF/Disassembler/ |
| H A D | BPFDisassembler.cpp | 204 Op.setImm(Make_64(Hi, Op.getImm())); in getInstruction()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVExtract.cpp | 187 Op.setImm(MaxAlign->value()); in runOnMachineFunction()
|
| H A D | HexagonVLIWPacketizer.cpp | 491 Off.setImm(NewOff); in useCallersSP() 510 Off.setImm(Off.getImm() + FrameSize + HEXAGON_LRFP_SIZE); in useCalleesSP() 544 MI.getOperand(OPI).setImm(Offset + Incr); in updateOffset() 555 MI.getOperand(OP).setImm(ChangedOffset); in undoChangedOffset()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.cpp | 212 MI.getOperand(3).setImm(LPAC::SUB); in eliminateFrameIndex()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 116 Instr.getOperand(2).setImm(0); in PostOperandDecodeAdjust()
|