| /openbsd-src/gnu/llvm/llvm/lib/MC/ |
| H A D | MCInstrDesc.cpp | 34 for (MCPhysReg ImpDef : implicit_defs()) in hasImplicitDefOfPhysReg()
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| /openbsd-src/gnu/llvm/llvm/tools/llvm-reduce/deltas/ |
| H A D | ReduceRegisterUses.cpp | 32 MI.getDesc().implicit_defs().size() + in removeUsesFromFunction()
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| H A D | ReduceRegisterDefs.cpp | 43 MI.getDesc().implicit_defs().size() + in removeDefsFromFunction()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGFast.cpp | 429 assert(!MCID.implicit_defs().empty() && in getPhysicalRegisterVT()
432 for (MCPhysReg ImpDef : MCID.implicit_defs()) { in getPhysicalRegisterVT()
530 for (MCPhysReg Reg : MCID.implicit_defs()) in DelayForLiveRegsBottomUp()
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| H A D | FastISel.cpp | 1942 .addReg(II.implicit_defs()[0]); in fastEmitInst_r()
1967 .addReg(II.implicit_defs()[0]); in fastEmitInst_rr()
1994 .addReg(II.implicit_defs()[0]); in fastEmitInst_rrr()
2017 .addReg(II.implicit_defs()[0]); in fastEmitInst_ri()
2042 .addReg(II.implicit_defs()[0]); in fastEmitInst_rii()
2062 .addReg(II.implicit_defs()[0]); in fastEmitInst_f()
2088 .addReg(II.implicit_defs()[0]); in fastEmitInst_rri()
2105 .addReg(II.implicit_defs()[0]); in fastEmitInst_i()
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| H A D | InstrEmitter.cpp | 1024 bool HasPhysRegOuts = NumResults > NumDefs && !II.implicit_defs().empty() && in EmitMachineNode()
1034 II.getNumOperands() + II.implicit_defs().size() + NumImpUses && in EmitMachineNode()
1131 Register Reg = II.implicit_defs()[i - NumDefs]; in EmitMachineNode()
1165 if (!UsedRegs.empty() || !II.implicit_defs().empty() || II.hasOptionalDef()) in EmitMachineNode()
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| H A D | ScheduleDAGRRList.cpp | 1287 assert(!MCID.implicit_defs().empty() && in getPhysicalRegisterVT()
1290 for (MCPhysReg ImpDef : MCID.implicit_defs()) { in getPhysicalRegisterVT()
1442 for (MCPhysReg Reg : MCID.implicit_defs()) in DelayForLiveRegsBottomUp()
2869 TII->get(SU->getNode()->getMachineOpcode()).implicit_defs(); in canClobberReachingPhysRegUse()
2905 ArrayRef<MCPhysReg> ImpDefs = TII->get(N->getMachineOpcode()).implicit_defs(); in canClobberPhysRegDefs()
2912 TII->get(SUNode->getMachineOpcode()).implicit_defs(); in canClobberPhysRegDefs()
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| H A D | ScheduleDAGSDNodes.cpp | 467 !TII->get(N->getMachineOpcode()).implicit_defs().empty()) { in AddSchedEdges()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 582 ArrayRef<MCPhysReg> implicit_defs() const { in implicit_defs() function
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| /openbsd-src/gnu/llvm/llvm/lib/MCA/ |
| H A D | InstrBuilder.cpp | 315 unsigned NumImplicitDefs = MCDesc.implicit_defs().size(); in populateWrites()
368 Write.RegisterID = MCDesc.implicit_defs()[CurrentDef]; in populateWrites()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenMux.cpp | 163 for (MCPhysReg R : D.implicit_defs()) in getDefsUses()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 207 MI.getDesc().implicit_defs().size(), in copyExtraImplicitOps()
600 MI.getDesc().implicit_defs().size(), in dropInstructionKeepingImpDefs()
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| H A D | SIFoldOperands.cpp | 997 Desc.implicit_defs().size(); in mutateCopyOp()
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| /openbsd-src/gnu/llvm/llvm/tools/llvm-exegesis/lib/ |
| H A D | MCInstrDescView.cpp | 131 for (MCPhysReg MCPhysReg : Description->implicit_defs()) { in create()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86FixupGadgets.cpp | 545 const ArrayRef<MCPhysReg> ImpDefs = Desc.implicit_defs(); in hasImplicitUseOrDef()
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| H A D | X86FastISel.cpp | 4004 .addReg(II.implicit_defs()[0]); in fastEmitInst_rrrr()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 525 unsigned NumImplicitDefs = Desc.implicit_defs().size(); in clearsSuperRegisters()
564 const MCPhysReg Reg = Desc.implicit_defs()[I]; in clearsSuperRegisters()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.cpp | 109 for (MCPhysReg R : MCID.implicit_defs()) { in init()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 313 .addReg(II.implicit_defs()[0])); in fastEmitInst_r()
340 .addReg(II.implicit_defs()[0])); in fastEmitInst_rr()
365 .addReg(II.implicit_defs()[0])); in fastEmitInst_ri()
384 .addReg(II.implicit_defs()[0])); in fastEmitInst_i()
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| H A D | Thumb2SizeReduction.cpp | 256 return is_contained(MCID.implicit_defs(), ARM::CPSR); in HasImplicitCPSRDef()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | RDFGraph.cpp | 626 if (D.implicit_defs().empty() && D.implicit_uses().empty()) in isFixedReg()
636 Op.isDef() ? D.implicit_defs() : D.implicit_uses(); in isFixedReg()
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| H A D | MachineInstr.cpp | 87 for (MCPhysReg ImpDef : MCID->implicit_defs()) in addImplicitDefUseOperands()
102 if (unsigned NumOps = MCID->getNumOperands() + MCID->implicit_defs().size() + in MachineInstr()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 595 return getNumExplicitDefs() + MCID->implicit_defs().size();
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 1422 for (MCPhysReg ImpDef : MCID.implicit_defs()) in verifyImplicitOperands()
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| /openbsd-src/gnu/llvm/llvm/lib/MC/MCParser/ |
| H A D | AsmParser.cpp | 6065 llvm::append_range(ClobberRegs, Desc.implicit_defs()); in parseMSInlineAsm()
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