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Searched refs:getNode (Results 1 – 25 of 206) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVECustomDAG.cpp219 if (MemSDNode *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getNodeChain()
231 if (auto *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getMemoryPtr()
300 if (auto *StoreN = dyn_cast<VPStridedStoreSDNode>(Op.getNode())) in getLoadStoreStride()
302 if (auto *StoreN = dyn_cast<VPStridedLoadSDNode>(Op.getNode())) in getLoadStoreStride()
305 if (isa<MemSDNode>(Op.getNode())) { in getLoadStoreStride()
308 uint64_t ElemStride = getIdiomaticVectorType(Op.getNode()) in getLoadStoreStride()
317 if (auto *N = dyn_cast<MaskedGatherScatterSDNode>(Op.getNode())) in getGatherScatterIndex()
319 if (auto *N = dyn_cast<VPGatherScatterSDNode>(Op.getNode())) in getGatherScatterIndex()
325 if (auto *N = dyn_cast<MaskedGatherScatterSDNode>(Op.getNode())) in getGatherScatterScale()
327 if (auto *N = dyn_cast<VPGatherScatterSDNode>(Op.getNode())) in getGatherScatterScale()
[all …]
H A DVVPISelLowering.cpp33 auto LoRes = CDAG.getNode(Opc, MVT::v256i1, {LoA, LoB}); in splitMaskArithmetic()
34 auto HiRes = CDAG.getNode(Opc, MVT::v256i1, {HiA, HiB}); in splitMaskArithmetic()
59 EVT OpVecVT = *getIdiomaticVectorType(Op.getNode()); in lowerToVVP()
84 return CDAG.getNode(VVPOpcode, LegalVecVT, {Op->getOperand(0), Mask, AVL}); in lowerToVVP()
86 return CDAG.getNode(VVPOpcode, LegalVecVT, in lowerToVVP()
105 return CDAG.getNode(VVPOpcode, LegalVecVT, {X, Y, Z, Mask, AVL}); in lowerToVVP()
111 return CDAG.getNode(VVPOpcode, LegalVecVT, {OnTrue, OnFalse, Mask, AVL}); in lowerToVVP()
118 return CDAG.getNode(VVPOpcode, LegalResVT, {LHS, RHS, Pred, Mask, AVL}); in lowerToVVP()
140 auto DataVT = *getIdiomaticVectorType(Op.getNode()); in lowerVVP_LOAD_STORE()
155 auto NewLoadV = CDAG.getNode(VEISD::VVP_LOAD, {LegalDataVT, MVT::Other}, in lowerVVP_LOAD_STORE()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp547 const auto Flags = Op.getNode()->getFlags(); in mayIgnoreSignedZero()
799 if (!allUsesHaveSourceMods(Op.getNode())) in getNegatedExpression()
1144 return DAG.getNode(AMDGPUISD::ENDPGM, DL, MVT::Other, Chain); in LowerReturn()
1176 for (SDNode *U : DAG.getEntryNode().getNode()->uses()) { in addTokenForArgument()
1193 return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains); in addTokenForArgument()
1324 SDValue Trap = DAG.getNode(ISD::TRAP, DL, MVT::Other, DAG.getEntryNode()); in LowerGlobalAddress()
1325 SDValue OutputChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, in LowerGlobalAddress()
1359 SDValue NewIn = DAG.getNode(ISD::BITCAST, SL, NewEltVT, In); in LowerCONCAT_VECTORS()
1369 return DAG.getNode(ISD::BITCAST, SL, VT, BV); in LowerCONCAT_VECTORS()
1437 return DAG.getNode(AMDGPUISD::FMIN_LEGACY, DL, VT, RHS, LHS); in combineFMinMaxLegacy()
[all …]
H A DAMDGPUHSAMetadataStreamer.cpp613 Dims.push_back(Dims.getDocument()->getNode( in getWorkGroupDimensions()
620 Version.push_back(Version.getDocument()->getNode(VersionMajorV3)); in emitVersion()
621 Version.push_back(Version.getDocument()->getNode(VersionMinorV3)); in emitVersion()
633 Printf.push_back(Printf.getDocument()->getNode( in emitPrintf()
648 Kern[".language"] = Kern.getDocument()->getNode("OpenCL C"); in emitKernelLanguage()
650 LanguageVersion.push_back(Kern.getDocument()->getNode( in emitKernelLanguage()
652 LanguageVersion.push_back(Kern.getDocument()->getNode( in emitKernelLanguage()
665 Kern[".vec_type_hint"] = Kern.getDocument()->getNode( in emitKernelAttrs()
672 Kern[".device_enqueue_symbol"] = Kern.getDocument()->getNode( in emitKernelAttrs()
677 Kern[".kind"] = Kern.getDocument()->getNode("init"); in emitKernelAttrs()
[all …]
H A DR600ISelLowering.cpp414 assert((!Result.getNode() || in LowerOperation()
415 Result.getNode()->getNumValues() == 2) && in LowerOperation()
442 return DAG.getNode(AMDGPUISD::R600_EXPORT, DL, Op.getValueType(), Args); in LowerOperation()
492 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, MVT::v4f32, TexArgs); in LowerOperation()
496 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
498 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
500 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
502 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
504 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
506 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/BinaryFormat/
H A DMsgPackDocument.cpp31 return find(getDocument()->getNode(S)); in find()
37 return (*this)[getDocument()->getNode(S)]; in operator []()
53 return (*this)[getDocument()->getNode(Key)]; in operator []()
56 return (*this)[getDocument()->getNode(Key)]; in operator []()
59 return (*this)[getDocument()->getNode(Key)]; in operator []()
62 return (*this)[getDocument()->getNode(Key)]; in operator []()
80 *this = getDocument()->getNode(Val); in operator =()
84 *this = getDocument()->getNode(Val); in operator =()
88 *this = getDocument()->getNode(Val); in operator =()
92 *this = getDocument()->getNode(Val); in operator =()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp285 if (Res.getNode()) in PromoteIntegerResult()
298 return DAG.getNode(ISD::AssertSext, SDLoc(N), in PromoteIntRes_AssertSext()
305 return DAG.getNode(ISD::AssertZext, SDLoc(N), in PromoteIntRes_AssertZext()
398 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); in PromoteIntRes_BITCAST()
402 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST()
405 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftPromotedHalf(InOp)); in PromoteIntRes_BITCAST()
409 return DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, GetPromotedFloat(InOp)); in PromoteIntRes_BITCAST()
418 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
435 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST()
439 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); in PromoteIntRes_BITCAST()
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H A DTargetLowering.cpp431 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Call.second, in softenSetCCOperands()
433 NewLHS = DAG.getNode(ShouldInvertCC ? ISD::AND : ISD::OR, dl, in softenSetCCOperands()
509 return TLO.New.getNode(); in ShrinkDemandedConstant()
530 SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC); in ShrinkDemandedConstant()
559 assert(Op.getNode()->getNumValues() == 1 && in ShrinkDemandedOp()
571 if (!Op.getNode()->hasOneUse()) in ShrinkDemandedOp()
586 SDValue X = DAG.getNode( in ShrinkDemandedOp()
588 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)), in ShrinkDemandedOp()
589 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1))); in ShrinkDemandedOp()
591 SDValue Z = DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), X); in ShrinkDemandedOp()
[all …]
H A DDAGCombiner.cpp335 AddToWorklist(Op.getNode()); in SimplifyDemandedBits()
893 AddToWorklist(Op.getNode()); in deleteAndRecombine()
1007 ISD::isBuildVectorOfConstantFPSDNodes(V.getNode()); in isAnyConstantBuildVector()
1115 return DAG.getNode(Opc, DL, VT, N00, OpNode); in reassociateOpsCommutative()
1121 SDValue OpNode = DAG.getNode(Opc, SDLoc(N0), VT, N00, N1); in reassociateOpsCommutative()
1122 return DAG.getNode(Opc, DL, VT, OpNode, N01); in reassociateOpsCommutative()
1151 return DAG.getNode(Opc, DL, VT, SDValue(NE, 0), N01); in reassociateOpsCommutative()
1161 return DAG.getNode(Opc, DL, VT, SDValue(NE, 0), N00); in reassociateOpsCommutative()
1195 assert((!To[i].getNode() || in CombineTo()
1204 if (To[i].getNode()) in CombineTo()
[all …]
H A DLegalizeTypesGeneric.cpp58 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
59 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
69 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
70 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
77 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
78 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
96 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
97 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
[all …]
H A DResourcePriorityQueue.cpp74 const SDNode *ScegN = PredSU->getNode(); in numberRCValPredInSU()
112 const SDNode *ScegN = SuccSU->getNode(); in numberRCValSuccInSU()
131 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in numberRCValSuccInSU()
239 if (!SU || !SU->getNode()) in isResourceAvailable()
244 if (SU->getNode()->getGluedNode()) in isResourceAvailable()
249 if (SU->getNode()->isMachineOpcode()) in isResourceAvailable()
250 switch (SU->getNode()->getMachineOpcode()) { in isResourceAvailable()
253 SU->getNode()->getMachineOpcode()))) in isResourceAvailable()
284 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) { in reserveResources()
289 if (SU->getNode() && SU->getNode()->isMachineOpcode()) { in reserveResources()
[all …]
H A DLegalizeDAG.cpp224 UpdatedNodes->insert(New.getNode()); in ReplaceNode()
225 ReplacedNode(Old.getNode()); in ReplaceNode()
236 UpdatedNodes->insert(New[i].getNode()); in ReplaceNode()
247 UpdatedNodes->insert(New.getNode()); in ReplaceNodeWithValue()
248 ReplacedNode(Old.getNode()); in ReplaceNodeWithValue()
379 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in PerformInsertVectorEltInMemory()
407 SDValue ScVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, in ExpandINSERT_VECTOR_ELT()
482 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi); in OptimizeFloatStore()
500 if (SDNode *OptStore = OptimizeFloatStore(ST).getNode()) { in LegalizeStoreOps()
534 Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value); in LegalizeStoreOps()
[all …]
H A DLegalizeVectorTypes.cpp197 if (R.getNode()) in ScalarizeVectorResult()
204 return DAG.getNode(N->getOpcode(), SDLoc(N), in ScalarizeVecRes_BinOp()
212 return DAG.getNode(N->getOpcode(), SDLoc(N), Op0.getValueType(), Op0, Op1, in ScalarizeVecRes_TernaryOp()
220 return DAG.getNode(N->getOpcode(), SDLoc(N), Op0.getValueType(), Op0, Op1, in ScalarizeVecRes_FIX()
245 Oper = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, in ScalarizeVecRes_StrictFPOp()
253 SDValue Result = DAG.getNode(N->getOpcode(), dl, DAG.getVTList(ValueVTs), in ScalarizeVecRes_StrictFPOp()
282 SDNode *ScalarNode = DAG.getNode( in ScalarizeVecRes_OverflowOp()
283 N->getOpcode(), DL, ScalarVTs, ScalarLHS, ScalarRHS).getNode(); in ScalarizeVecRes_OverflowOp()
292 SDValue OtherVal = DAG.getNode( in ScalarizeVecRes_OverflowOp()
313 return DAG.getNode(ISD::BITCAST, SDLoc(N), in ScalarizeVecRes_BITCAST()
[all …]
H A DLegalizeFloatTypes.cpp154 if (R.getNode()) { in SoftenFloatResult()
155 assert(R.getNode() != N); in SoftenFloatResult()
206 return DAG.getNode(ISD::FREEZE, SDLoc(N), Ty, in SoftenFloatRes_FREEZE()
212 SDValue NewFence = DAG.getNode(ISD::ARITH_FENCE, SDLoc(N), Ty, in SoftenFloatRes_ARITH_FENCE()
225 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), in SoftenFloatRes_BUILD_PAIR()
258 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), in SoftenFloatRes_EXTRACT_VECTOR_ELT()
272 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask); in SoftenFloatRes_FABS()
277 return SoftenFloatRes_SELECT_CC(SelCC.getNode()); in SoftenFloatRes_FMINNUM()
288 return SoftenFloatRes_SELECT_CC(SelCC.getNode()); in SoftenFloatRes_FMAXNUM()
336 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN()
[all …]
H A DSelectionDAGBuilder.cpp199 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
200 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
206 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi); in getCopyFromParts()
220 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi); in getCopyFromParts()
221 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi, in getCopyFromParts()
225 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo); in getCopyFromParts()
226 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi); in getCopyFromParts()
233 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]); in getCopyFromParts()
234 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]); in getCopyFromParts()
237 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi); in getCopyFromParts()
[all …]
H A DLegalizeVectorOps.cpp255 SDNode *Node = DAG.UpdateNodeOperands(Op.getNode(), Ops); in LegalizeOp()
516 if (!Res.getNode()) in LowerOperationWrapper()
585 Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(j)); in Promote()
587 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(j)); in Promote()
593 DAG.getNode(Node->getOpcode(), dl, NVT, Operands, Node->getFlags()); in Promote()
598 Res = DAG.getNode(ISD::FP_ROUND, dl, VT, Res, in Promote()
601 Res = DAG.getNode(ISD::BITCAST, dl, VT, Res); in Promote()
625 Operands[j] = DAG.getNode(Opc, dl, NVT, Node->getOperand(j)); in PromoteINT_TO_FP()
631 SDValue Res = DAG.getNode(Node->getOpcode(), dl, in PromoteINT_TO_FP()
639 DAG.getNode(Node->getOpcode(), dl, Node->getValueType(0), Operands); in PromoteINT_TO_FP()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp502 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps); in getInt()
549 return DAG.getNode(ISD::CONCAT_VECTORS, dl, typeJoin(ty(Ops)), in opJoin()
727 return DAG.getNode(ISD::SHL, dl, MVT::i32, in convertToByteIndex()
743 SDValue SubIdx = DAG.getNode(ISD::AND, dl, MVT::i32, {Idx, Mask}); in getIndexInWord32()
814 if (!SplatV.getNode()) in buildHvxVectorReg()
830 assert(SplatV.getNode()); in buildHvxVectorReg()
831 auto *IdxN = dyn_cast<ConstantSDNode>(SplatV.getNode()); in buildHvxVectorReg()
835 SDValue S = DAG.getNode(ISD::SPLAT_VECTOR, dl, WordTy, SplatV); in buildHvxVectorReg()
873 if (Vec.getNode() != nullptr && T.getNode() != Vec.getNode()) in buildHvxVectorReg()
943 SDValue SplatV = DAG.getNode(ISD::SPLAT_VECTOR, dl, VecTy, Words[n]); in buildHvxVectorReg()
[all …]
H A DHexagonISelDAGToDAG.cpp75 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue(); in INITIALIZE_PASS()
246 SelectStore(TS.getNode()); in StoreInstrForLoadIntrinsic()
247 StoreN = Handle.getValue().getNode(); in StoreInstrForLoadIntrinsic()
277 SDNode *C = Ch.getNode(); in tryLoadOfLoadIntrinsic()
305 if (C->getNumOperands() < 4 || Loc.getNode() != C->getOperand(3).getNode()) in tryLoadOfLoadIntrinsic()
474 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue(); in SelectIndexedStore()
692 SDValue R = CurDAG->getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), in SelectIntrinsicWOChain()
694 ReplaceNode(N, R.getNode()); in SelectIntrinsicWOChain()
695 SelectCode(R.getNode()); in SelectIntrinsicWOChain()
717 ReplaceNode(N, Ext.getNode()); in SelectExtractSubvector()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp2141 Val = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocVT.getSizeInBits()), in MoveToHPR()
2144 Val = DAG.getNode(ARMISD::VMOVhr, dl, ValVT, Val); in MoveToHPR()
2146 Val = DAG.getNode(ISD::TRUNCATE, dl, in MoveToHPR()
2148 Val = DAG.getNode(ISD::BITCAST, dl, ValVT, Val); in MoveToHPR()
2157 Val = DAG.getNode(ARMISD::VMOVrh, dl, in MoveFromHPR()
2160 Val = DAG.getNode(ISD::BITCAST, dl, in MoveFromHPR()
2162 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, in MoveFromHPR()
2165 return DAG.getNode(ISD::BITCAST, dl, LocVT, Val); in MoveFromHPR()
2209 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2212 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp257 if (ISD::isConstantSplatVectorAllOnes(Op.getNode())) in isZeroingInactiveLanes()
1970 isIntImmediate(N->getOperand(1).getNode(), Imm); in isOpcWithIntImmediate()
2054 New = TLO.DAG.getNode(Op.getOpcode(), DL, VT, Op.getOperand(0), in optimizeLogicalImm()
2836 N = N->getOperand(0).getNode(); in isZerosVector()
3034 LHS = DAG.getNode(ISD::STRICT_FP_EXTEND, dl, {MVT::f32, MVT::Other}, in emitStrictFPComparison()
3036 RHS = DAG.getNode(ISD::STRICT_FP_EXTEND, dl, {MVT::f32, MVT::Other}, in emitStrictFPComparison()
3043 return DAG.getNode(Opcode, dl, {VT, MVT::Other}, {Chain, LHS, RHS}); in emitStrictFPComparison()
3054 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS); in emitComparison()
3055 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS); in emitComparison()
3058 return DAG.getNode(AArch64ISD::FCMP, dl, VT, LHS, RHS); in emitComparison()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp211 case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG); in LowerOperation()
252 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
257 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
259 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
290 GA = DAG.getNode(ISD::ADD, DL, MVT::i32, GA, Remaining); in LowerGlobalAddress()
315 return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, PtrVT, Result); in LowerBlockAddress()
333 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res); in LowerConstantPool()
355 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index); in LowerBR_JT()
358 SDValue ScaledIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index, in LowerBR_JT()
360 return DAG.getNode(XCoreISD::BR_JT32, dl, MVT::Other, Chain, TargetJT, in LowerBR_JT()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2832 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(ValueBits), Val); in splitValueIntoRegisterParts()
2833 Val = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::getIntegerVT(PartBits), Val); in splitValueIntoRegisterParts()
2834 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); in splitValueIntoRegisterParts()
2850 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(PartBits), Val); in joinRegisterPartsIntoValue()
2851 Val = DAG.getNode(ISD::TRUNCATE, DL, MVT::getIntegerVT(ValueBits), Val); in joinRegisterPartsIntoValue()
2852 Val = DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in joinRegisterPartsIntoValue()
2907 return DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(), in getPICJumpTableRelocBase()
3109 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, Dl, ValLoc, ValArg, in lowerMasksToReg()
3120 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValToCopy); in lowerMasksToReg()
3131 return DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValArg); in lowerMasksToReg()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp350 if (Result.getNode()) { in LowerAsmOperandForConstraint()
467 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
470 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
474 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
516 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Copy, Chain); in LowerCCCArguments()
591 if (Flag.getNode()) in LowerReturn()
595 return DAG.getNode(Opc, DL, MVT::Other, in LowerReturn()
672 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
675 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
678 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp389 return SDValue(OutRetAddr.getNode(), 1); in EmitTailCallLoadRetAddr()
475 return VA.isExtInLoc() ? DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val) in LowerMemArgument()
487 PtrOff = DAG.getNode(ISD::ADD, DL, getPointerTy(DAG.getDataLayout()), in LowerMemOpCallTo()
638 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, RegVT, Arg); in LowerCall()
641 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, RegVT, Arg); in LowerCall()
644 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, RegVT, Arg); in LowerCall()
665 if (!StackPtr.getNode()) { in LowerCall()
675 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains); in LowerCall()
723 if (!StackPtr.getNode()) { in LowerCall()
727 Source = DAG.getNode(ISD::ADD, DL, getPointerTy(DAG.getDataLayout()), in LowerCall()
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/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp290 SDValue Part0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, in LowerReturn_32()
293 SDValue Part1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, in LowerReturn_32()
330 if (Flag.getNode()) in LowerReturn_32()
333 return DAG.getNode(SPISD::RET_FLAG, DL, MVT::Other, RetOps); in LowerReturn_32()
371 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
374 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
377 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
386 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal, in LowerReturn_64()
392 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]); in LowerReturn_64()
393 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV); in LowerReturn_64()
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