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Searched refs:bitsGT (Results 1 – 21 of 21) sorted by relevance

/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DValueTypes.h256 bool bitsGT(EVT VT) const { in bitsGT() function
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp105 if (Src.getValueType().bitsGT(MVT::i32)) in EmitSpecializedLibcall()
H A DARMISelLowering.cpp12650 unsigned ExtOp = VT.bitsGT(tmp.getValueType()) ? ISD::ANY_EXTEND : ISD::TRUNCATE; in AddCombineBUILD_VECTORToVPADDL()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86SelectionDAGInfo.cpp106 if (AVT.bitsGT(MVT::i8)) { in EmitTargetCodeForMemset()
H A DX86FastISel.cpp3627 if (DstVT.bitsGT(SrcVT)) in fastSelectInstruction()
H A DX86ISelLowering.cpp23711 if (Sign.getSimpleValueType().bitsGT(VT)) in LowerFCOPYSIGN()
/openbsd-src/gnu/llvm/llvm/include/llvm/Support/
H A DMachineValueType.h1196 bool bitsGT(MVT VT) const { in bitsGT() function
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp394 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()
1786 if (DstVT.bitsGT(SrcVT)) in selectOperator()
H A DSelectionDAG.cpp1389 return VT.bitsGT(Op.getValueType()) in getFPExtendOrRound()
1401 VT.bitsGT(Op.getValueType()) in getStrictFPExtendOrRound()
1410 return VT.bitsGT(Op.getValueType()) ? in getAnyExtOrTrunc()
1416 return VT.bitsGT(Op.getValueType()) ? in getSExtOrTrunc()
1422 return VT.bitsGT(Op.getValueType()) ? in getZExtOrTrunc()
1493 if (VT.bitsGT(Op.getValueType())) in getVPZExtOrTrunc()
5127 if (SVT.bitsGT(VT.getScalarType())) { in foldCONCAT_VECTORS()
5493 assert(Operand.getValueType().bitsGT(VT) && in getNode()
5503 if (Operand.getOperand(0).getValueType().bitsGT(VT)) in getNode()
5954 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) { in FoldConstantArithmetic()
[all …]
H A DLegalizeDAG.cpp1747 if ((SrcVT.bitsGT(SlotVT) && in EmitStackConvert()
1767 if (SrcVT.bitsGT(SlotVT)) in EmitStackConvert()
H A DDAGCombiner.cpp5756 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
13771 if (N0.getOperand(0).getValueType().bitsGT(VT)) in visitTRUNCATE()
20394 ResultVT.bitsGT(VecEltVT) ? ISD::NON_EXTLOAD : ISD::EXTLOAD; in scalarizeExtractedVectorLoad()
20428 if (ResultVT.bitsGT(VecEltVT)) { in scalarizeExtractedVectorLoad()
20685 InOp.getValueType().bitsGT(ScalarVT)); in visitEXTRACT_VECTOR_ELT()
20866 if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType())) in visitEXTRACT_VECTOR_ELT()
25370 if (XType.bitsGT(AType)) { in foldSelectCCToShiftAnd()
25390 if (XType.bitsGT(AType)) { in foldSelectCCToShiftAnd()
H A DLegalizeVectorTypes.cpp1742 if (EltVT.bitsGT(Elt.getValueType())) in SplitVecRes_INSERT_VECTOR_ELT()
2388 if (Ops[I].getValueType().bitsGT(EltVT)) in SplitVecRes_VECTOR_SHUFFLE()
H A DTargetLowering.cpp225 if (VT.bitsGT(LVT)) in findOptimalMemOpLowering()
4592 if (Op0.getValueType().bitsGT(VT)) in SimplifySetCC()
H A DSelectionDAGBuilder.cpp753 if (BuiltVectorTy.getVectorElementType().bitsGT( in getCopyToPartsVector()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1562 return VT.bitsGT(MVT::i32) && Alignment >= Align(4); in allowsMisalignedMemoryAccesses()
1809 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp3212 if (SVT.isInteger() && SVT.bitsGT(XLenVT)) { in lowerVECTOR_SHUFFLE()
3456 if (IndexVT.getScalarType().bitsGT(XLenVT)) { in lowerVECTOR_SHUFFLE()
3569 if (FloatVT.bitsGT(VT)) { in lowerCTLZ_CTTZ_ZERO_UNDEF()
3598 else if (IntVT.bitsGT(VT)) in lowerCTLZ_CTTZ_ZERO_UNDEF()
6282 if (VecVT.bitsGT(getLMUL1VT(VecVT))) { in lowerINSERT_SUBVECTOR()
6310 if (VecVT.bitsGT(InterSubVT)) in lowerINSERT_SUBVECTOR()
6415 if (VecVT.bitsGT(getLMUL1VT(VecVT))) { in lowerEXTRACT_SUBVECTOR()
7410 if (XLenVT == MVT::i32 && IndexVT.getVectorElementType().bitsGT(XLenVT)) { in lowerMaskedGather()
7512 if (XLenVT == MVT::i32 && IndexVT.getVectorElementType().bitsGT(XLenVT)) { in lowerMaskedScatter()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3463 if (Elem0.getValueType().bitsGT(TruncTy)) in PerformDAGCombine()
3504 if (ty(Elem0).bitsGT(TruncTy)) in PerformDAGCombine()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp4918 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
H A DAArch64ISelLowering.cpp4736 if (InVT.bitsGT(VT)) in getSVEPredicateBitCast()
23661 if (VT.bitsGT(SrcVT)) { in LowerFixedLengthFPToIntToSVE()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp6669 if (!LoadResultVT.bitsGT(TruncVT) || !TruncVT.isRound() || in optimizeLoadExt()
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp15358 if (Op1VT.bitsGT(mVT)) { in PerformDAGCombine()