| /openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 185 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument
195 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding()
199 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding()
206 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency() argument
214 int UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency()
220 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
|
| H A D | MCSubtargetInfo.h | 184 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument
191 if (I->UseIdx < UseIdx) in getReadAdvanceCycles()
193 if (I->UseIdx > UseIdx) in getReadAdvanceCycles()
|
| H A D | MCSchedule.h | 95 unsigned UseIdx; member
100 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 680 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
682 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
683 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
691 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
699 if (SwapVector[UseIdx].IsSwap && !SwapVector[UseIdx].IsLoad && in recordUnoptimizableWebs()
700 !SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
712 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
746 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
748 if (SwapVector[UseIdx].VSEMI->getOpcode() != MI->getOpcode()) { in recordUnoptimizableWebs()
757 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
[all …]
|
| H A D | PPCInstrInfo.h | 444 unsigned UseIdx) const override;
447 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency() argument
449 UseNode, UseIdx); in getOperandLatency()
|
| H A D | PPCInstrInfo.cpp | 171 unsigned UseIdx) const { in getOperandLatency()
173 UseMI, UseIdx); in getOperandLatency()
2086 unsigned UseIdx; in onlyFoldImmediate() local
2087 for (UseIdx = 0; UseIdx < UseMI.getNumOperands(); ++UseIdx) in onlyFoldImmediate()
2088 if (UseMI.getOperand(UseIdx).isReg() && in onlyFoldImmediate()
2089 UseMI.getOperand(UseIdx).getReg() == Reg) in onlyFoldImmediate()
2092 assert(UseIdx < UseMI.getNumOperands() && "Cannot find Reg in UseMI"); in onlyFoldImmediate()
2093 assert(UseIdx < UseMCID.getNumOperands() && "No operand description for Reg"); in onlyFoldImmediate()
2095 const MCOperandInfo *UseInfo = &UseMCID.operands()[UseIdx]; in onlyFoldImmediate()
2125 UseMI.getOperand(UseIdx).setReg(ZeroReg); in onlyFoldImmediate()
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | LiveRangeEdit.cpp | 108 SlotIndex UseIdx) const { in allUsesAvailableAt()
110 UseIdx = std::max(UseIdx, UseIdx.getRegSlot(true)); in allUsesAvailableAt()
131 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) in allUsesAvailableAt()
134 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt()
146 if (!SR.liveAt(UseIdx)) in allUsesAvailableAt()
159 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt() argument
176 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt()
|
| H A D | LiveIntervalCalc.cpp | 172 SlotIndex UseIdx; in extendToUses() local
177 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo + 1).getMBB()); in extendToUses()
189 UseIdx = Indexes->getInstructionIndex(*MI).getRegSlot(isEarlyClobber); in extendToUses()
194 extend(LR, UseIdx, Reg, Undefs); in extendToUses()
|
| H A D | TargetSchedule.cpp | 158 unsigned UseIdx = 0; in findUseIdx() local
162 ++UseIdx; in findUseIdx()
164 return UseIdx; in findUseIdx()
216 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
217 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); in computeOperandLatency()
|
| H A D | MachineCopyPropagation.cpp | 332 const MachineInstr &UseI, unsigned UseIdx);
335 unsigned UseIdx);
443 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { in isBackwardPropagatableRegClassCopy() argument
449 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isBackwardPropagatableRegClassCopy()
462 unsigned UseIdx) { in isForwardableRegClassCopy() argument
470 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isForwardableRegClassCopy()
|
| H A D | InlineSpiller.cpp | 591 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true); in reMaterializeFor() local
592 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex()); in reMaterializeFor()
599 LLVM_DEBUG(dbgs() << UseIdx << '\t' << MI); in reMaterializeFor()
607 VNInfo *OrigVNI = OrigLI.getVNInfoAt(UseIdx); in reMaterializeFor()
611 if (!Edit->canRematerializeAt(RM, OrigVNI, UseIdx, false)) { in reMaterializeFor()
613 LLVM_DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << MI); in reMaterializeFor()
621 LLVM_DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << MI); in reMaterializeFor()
638 LLVM_DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << MI); in reMaterializeFor()
666 LLVM_DEBUG(dbgs() << "\t " << UseIdx << '\t' << MI << '\n'); in reMaterializeFor()
|
| H A D | RegisterCoalescer.cpp | 323 void addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx,
885 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
886 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); in removeCopyByCommutingDef()
935 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
936 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); in removeCopyByCommutingDef()
956 SlotIndex DefIdx = UseIdx.getRegSlot(); in removeCopyByCommutingDef()
1690 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1698 if (SR.liveAt(UseIdx)) { in eliminateUndefCopy()
1704 isLive = DstLI.liveAt(UseIdx); in eliminateUndefCopy()
1708 LLVM_DEBUG(dbgs() << "\tnew undef: " << UseIdx << '\t' << MI); in eliminateUndefCopy()
[all …]
|
| H A D | MachineVerifier.cpp | 256 SlotIndex UseIdx, const LiveRange &LR,
2314 unsigned MONum, SlotIndex UseIdx, in checkLivenessAtUse() argument
2318 LiveQueryResult LRQ = LR.Query(UseIdx); in checkLivenessAtUse()
2325 report_context(UseIdx); in checkLivenessAtUse()
2333 report_context(UseIdx); in checkLivenessAtUse()
2427 SlotIndex UseIdx = LiveInts->getInstructionIndex(*MI); in checkLiveness() local
2435 checkLivenessAtUse(MO, MONum, UseIdx, *LR, *Units); in checkLiveness()
2441 checkLivenessAtUse(MO, MONum, UseIdx, *LI, Reg); in checkLiveness()
2451 checkLivenessAtUse(MO, MONum, UseIdx, SR, Reg, SR.LaneMask); in checkLiveness()
2452 LiveQueryResult LRQ = SR.Query(UseIdx); in checkLiveness()
[all …]
|
| H A D | TargetInstrInfo.cpp | 1224 SDNode *UseNode, unsigned UseIdx) const { in getOperandLatency()
1235 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
1394 unsigned UseIdx) const { in getOperandLatency()
1397 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
|
| H A D | MachineCombiner.cpp | 235 int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg()); in getDepth() local
237 InstrPtr, UseIdx); in getDepth()
|
| H A D | SplitKit.h | 379 SlotIndex UseIdx, MachineBasicBlock &MBB,
|
| /openbsd-src/gnu/llvm/llvm/lib/IR/ |
| H A D | AbstractCallSite.cpp | 100 unsigned UseIdx = CB->getArgOperandNo(U); in AbstractCallSite() local
107 if (CBCalleeIdx != UseIdx) in AbstractCallSite()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 322 unsigned UseIdx) const override;
325 SDNode *UseNode, unsigned UseIdx) const override;
435 unsigned UseIdx, unsigned UseAlign) const;
439 unsigned UseIdx, unsigned UseAlign) const;
444 unsigned UseIdx, unsigned UseAlign) const;
450 const MachineInstr &UseMI, unsigned UseIdx,
466 unsigned UseIdx) const override;
|
| H A D | ARMBaseInstrInfo.cpp | 3968 unsigned UseIdx, unsigned UseAlign) const { in getVSTMUseCycle() argument
3969 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getVSTMUseCycle()
3971 return ItinData->getOperandCycle(UseClass, UseIdx); in getVSTMUseCycle()
4008 unsigned UseIdx, unsigned UseAlign) const { in getSTMUseCycle() argument
4009 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getSTMUseCycle()
4011 return ItinData->getOperandCycle(UseClass, UseIdx); in getSTMUseCycle()
4038 unsigned UseIdx, unsigned UseAlign) const { in getOperandLatency() argument
4042 if (DefIdx < DefMCID.getNumDefs() && UseIdx < UseMCID.getNumOperands()) in getOperandLatency()
4043 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
4093 UseCycle = ItinData->getOperandCycle(UseClass, UseIdx); in getOperandLatency()
[all …]
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | LiveRangeEdit.h | 200 SlotIndex UseIdx) const;
205 bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx,
|
| H A D | TargetInstrInfo.h | 1656 SDNode *UseNode, unsigned UseIdx) const;
1669 unsigned UseIdx) const;
1699 unsigned UseIdx) const { in hasHighOperandLatency() argument
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 473 int UseIdx = -1; in adjustSchedDependency() local
477 UseIdx = OpNum; in adjustSchedDependency()
482 if (UseIdx == -1) in adjustSchedDependency()
486 *DDst, UseIdx)); in adjustSchedDependency()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 702 unsigned UseIdx; in FoldImmediate() local
707 UseIdx = 2; in FoldImmediate()
730 UseIdx = 1; in FoldImmediate()
738 UseIdx = 2; in FoldImmediate()
747 UseMI.getOperand(1).setReg(UseMI.getOperand(UseIdx).getReg()); in FoldImmediate()
749 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal); in FoldImmediate()
|
| /openbsd-src/gnu/llvm/llvm/utils/TableGen/ |
| H A D | SubtargetEmitter.cpp | 1185 for (unsigned UseIdx = 0, EndIdx = Reads.size(); in GenSchedClassTables() local
1186 UseIdx != EndIdx; ++UseIdx) { in GenSchedClassTables()
1188 FindReadAdvance(SchedModels.getSchedRead(Reads[UseIdx]), ProcModel); in GenSchedClassTables()
1209 RAEntry.UseIdx = UseIdx; in GenSchedClassTables()
1316 OS << " {" << RAEntry.UseIdx << ", " in EmitSchedClassTables()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 626 unsigned UseIdx; in FoldImmediate() local
638 UseIdx = 2; in FoldImmediate()
640 UseIdx = 2, CommuteIdx = 1; in FoldImmediate()
652 UseIdx = 2; in FoldImmediate()
654 UseIdx = 2, CommuteIdx = 1; in FoldImmediate()
663 if (!commuteInstruction(UseMI, false, CommuteIdx, UseIdx)) in FoldImmediate()
670 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal); in FoldImmediate()
|