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Searched refs:SimpleTy (Results 1 – 25 of 66) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/include/llvm/Support/
H A DMachineValueType.h341 SimpleValueType SimpleTy = INVALID_SIMPLE_VALUE_TYPE; variable
344 constexpr MVT(SimpleValueType SVT) : SimpleTy(SVT) {} in MVT()
346 bool operator>(const MVT& S) const { return SimpleTy > S.SimpleTy; }
347 bool operator<(const MVT& S) const { return SimpleTy < S.SimpleTy; }
348 bool operator==(const MVT& S) const { return SimpleTy == S.SimpleTy; }
349 bool operator!=(const MVT& S) const { return SimpleTy != S.SimpleTy; }
350 bool operator>=(const MVT& S) const { return SimpleTy >= S.SimpleTy; }
351 bool operator<=(const MVT& S) const { return SimpleTy <= S.SimpleTy; }
355 return (SimpleTy >= MVT::FIRST_VALUETYPE && in isValid()
356 SimpleTy <= MVT::LAST_VALUETYPE); in isValid()
[all …]
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DValueTypes.h48 if (V.SimpleTy != VT.V.SimpleTy)
50 if (V.SimpleTy == MVT::INVALID_SIMPLE_VALUE_TYPE)
66 if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE) in getIntegerVT()
76 if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE)
85 if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE) in getVectorVT()
130 return V.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE; in isSimple()
471 return V.SimpleTy; in getRawBits()
480 if (L.V.SimpleTy == R.V.SimpleTy) in operator()
483 return L.V.SimpleTy < R.V.SimpleTy; in operator()
H A DTargetLowering.h887 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];
908 const TargetRegisterClass *RC = RepRegClassForVT[VT.SimpleTy]; in getRepRegClassFor()
915 return RepRegClassCostForVT[VT.SimpleTy]; in getRepRegClassCostFor()
938 (unsigned)VT.getSimpleVT().SimpleTy < std::size(RegClassForVT)); in isTypeLegal()
939 return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr; in isTypeLegal()
954 return ValueTypeActions[VT.SimpleTy]; in getTypeAction()
958 ValueTypeActions[VT.SimpleTy] = Action; in setTypeAction()
1119 return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op]; in getOperationAction()
1300 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getLoadExtAction()
1301 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getLoadExtAction()
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/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.cpp133 if (LocVT.SimpleTy == MVT::i64 || (IsDarwinILP32 && LocVT.SimpleTy == MVT::i32)) in CC_AArch64_Custom_Block()
135 else if (LocVT.SimpleTy == MVT::f16) in CC_AArch64_Custom_Block()
137 else if (LocVT.SimpleTy == MVT::f32 || LocVT.is32BitVector()) in CC_AArch64_Custom_Block()
139 else if (LocVT.SimpleTy == MVT::f64 || LocVT.is64BitVector()) in CC_AArch64_Custom_Block()
141 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
162 unsigned EltsPerReg = (IsDarwinILP32 && LocVT.SimpleTy == MVT::i32) ? 2 : 1; in CC_AArch64_Custom_Block()
H A DAArch64FastISel.cpp319 switch (VT.SimpleTy) { in getImplicitScaleFactor()
1166 switch (RetVT.SimpleTy) { in emitAddSub()
1185 RetVT.SimpleTy = std::max(RetVT.SimpleTy, MVT::i32); in emitAddSub()
1479 switch (VT.SimpleTy) { in emitCmp()
1656 MVT VT = std::max(MVT::i32, RetVT.SimpleTy); in emitLogicalOp()
1677 switch (RetVT.SimpleTy) { in emitLogicalOp_ri()
1727 switch (RetVT.SimpleTy) { in emitLogicalOp_rs()
1834 switch (VT.SimpleTy) { in emitLoad()
2064 switch (VT.SimpleTy) { in emitStoreRelease()
2123 switch (VT.SimpleTy) { in emitStore()
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/openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp849 switch (VT.getSimpleVT().SimpleTy) { in getLdStRegType()
935 MVT::SimpleValueType TargetVT = LD->getSimpleValueType(0).SimpleTy; in tryLoad()
1090 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector()
1097 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector()
1117 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector()
1124 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector()
1146 EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v2_ari_64, in tryLoadVector()
1154 EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4_ari_64, in tryLoadVector()
1165 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector()
1172 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector()
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H A DNVPTXTargetTransformInfo.cpp445 if (LT.second.SimpleTy == MVT::i64) in getArithmeticInstrCost()
/openbsd-src/gnu/llvm/llvm/utils/TableGen/
H A DCodeGenDAGPatterns.h88 return (Words[T.SimpleTy / WordWidth] >> (T.SimpleTy % WordWidth)) & 1; in count()
91 bool V = count(T.SimpleTy); in insert()
92 Words[T.SimpleTy / WordWidth] |= WordType(1) << (T.SimpleTy % WordWidth); in insert()
102 Words[T.SimpleTy / WordWidth] &= ~(WordType(1) << (T.SimpleTy % WordWidth)); in erase()
712 return Types[ResNo].getMachineValueType().SimpleTy; in getSimpleType()
H A DInfoByHwMode.cpp76 StringRef N = llvm::getEnumName(T.SimpleTy); in getMVTName()
H A DDAGISelMatcherGen.cpp38 VT = VVT.getSimple().SimpleTy; in getRegisterValueType()
45 assert((!T.isSimple() || T.getSimple().SimpleTy == VT) && in getRegisterValueType()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp229 auto isHvxTy = [this, IncludeBool](MVT SimpleTy) { in isTypeForHVX() argument
230 if (isHVXVectorType(SimpleTy, IncludeBool)) in isTypeForHVX()
232 auto Action = getTargetLowering()->getPreferredVectorAction(SimpleTy); in isTypeForHVX()
241 MVT SimpleTy = MVT::getVectorVT(ElemTy, VecLen); in isTypeForHVX() local
242 if (SimpleTy.isValid() && isHvxTy(SimpleTy)) in isTypeForHVX()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86FastISel.cpp334 switch (VT.SimpleTy) { in X86FastEmitLoad()
491 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
663 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
1357 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpOpcode()
1380 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpImmediateOpcode()
1559 switch (SrcVT.SimpleTy) { in X86SelectZExt()
1727 switch (SourceVT.SimpleTy) { in X86SelectBranch()
1926 switch (VT.SimpleTy) { in X86SelectDivRem()
2254 switch (RetVT.SimpleTy) { in X86FastEmitSSESelect()
2277 switch (RetVT.SimpleTy) { in X86FastEmitPseudoSelect()
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H A DX86ISelDAGToDAG.cpp3291 switch (MemVT.getSimpleVT().SimpleTy) { in foldLoadStoreIntoMemOperand()
4532 switch (TestVT.SimpleTy) { in getVPTESTMOpc()
4538 switch (TestVT.SimpleTy) { in getVPTESTMOpc()
4543 switch (TestVT.SimpleTy) { in getVPTESTMOpc()
5086 switch (NVT.SimpleTy) { in Select()
5163 switch (NVT.SimpleTy) { in Select()
5245 switch (NVT.SimpleTy) { in Select()
5363 switch (NVT.SimpleTy) { in Select()
5371 switch (NVT.SimpleTy) { in Select()
5382 switch (NVT.SimpleTy) { in Select()
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/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600RegisterInfo.cpp87 switch(VT.SimpleTy) { in getCFGStructurizerRegClass()
H A DAMDGPUTargetTransformInfo.cpp530 MVT::SimpleValueType SLT = LT.second.getScalarType().SimpleTy; in getArithmeticInstrCost()
699 MVT::SimpleValueType SLT = LT.second.getScalarType().SimpleTy; in getIntrinsicInstrCost()
/openbsd-src/gnu/llvm/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp147 switch (VT.SimpleTy) { in selectIndexedLoad()
191 if (VT.SimpleTy == MVT::i8 && Offs == 1 && Bank == 0) in selectIndexedProgMemLoad()
398 switch (VT.SimpleTy) { in select()
/openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp309 switch (VT.getSimpleVT().SimpleTy) { in isValidIndexedLoad()
335 switch (VT.SimpleTy) { in tryIndexedLoad()
/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp324 MVT::SimpleValueType SimpleTy = RegVT.getSimpleVT().SimpleTy; in LowerFormalArguments() local
325 switch (SimpleTy) { in LowerFormalArguments()
334 SimpleTy == MVT::i64 ? &BPF::GPRRegClass : &BPF::GPR32RegClass); in LowerFormalArguments()
/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/Utils/
H A DWebAssemblyTypeUtilities.cpp126 switch (Type.SimpleTy) { in toValType()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp504 switch (VT.SimpleTy) { in getOUTLINE_ATOMIC()
581 switch (VT.SimpleTy) { \ in getSYNC()
758 OpActions[(unsigned)VT.SimpleTy][NT] = Expand; in initActions()
964 assert((unsigned)SVT.SimpleTy < std::size(TransformToType)); in getTypeConversion()
965 MVT NVT = TransformToType[SVT.SimpleTy]; in getTypeConversion()
1263 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy]; in findRepresentativeClass()
1537 return getPointerTy(DL).SimpleTy; in getSetCCResultType()
H A DValueTypes.cpp153 switch (V.SimpleTy) { in getEVTString()
184 switch (V.SimpleTy) { in getTypeForEVT()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMFastISel.cpp802 switch (VT.SimpleTy) { in ARMSimplifyAddress()
858 if (VT.SimpleTy == MVT::f32 || VT.SimpleTy == MVT::f64) in AddLoadStoreOperands()
905 switch (VT.SimpleTy) { in ARMEmitLoad()
1044 switch (VT.SimpleTy) { in ARMEmitStore()
1381 switch (SrcVT.SimpleTy) { in ARMEmitCmp()
1815 Register ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy)); in SelectBinaryFPOp()
1908 switch (ArgVT.SimpleTy) { in ProcessCallArgs()
3048 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
H A DARMCallingConv.cpp198 switch (LocVT.SimpleTy) { in CC_ARM_AAPCS_Custom_Aggregate()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp757 switch (VT.SimpleTy) { in emitLoad()
811 switch (VT.SimpleTy) { in emitStore()
1365 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
1826 switch (SrcVT.SimpleTy) { in emitIntSExt32r1()
1844 switch (SrcVT.SimpleTy) { in emitIntSExt32r2()
1870 switch (SrcVT.SimpleTy) { in emitIntZExt()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp522 switch (RegVT.getSimpleVT().SimpleTy) { in LowerCallArguments()
525 << (unsigned)RegVT.getSimpleVT().SimpleTy << "\n"); in LowerCallArguments()

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