Searched refs:OutVal (Results 1 – 6 of 6) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | InstrRefBasedImpl.cpp | 2784 const DbgValue &OutVal = *OutValIt->second; in pickVPHILoc() local
2787 if (OutVal.Kind == DbgValue::NoVal) in pickVPHILoc()
2792 if (OutVal.isUnjoinedPHI() && OutVal.BlockNo != MBB.getNumber()) in pickVPHILoc()
2795 if (!FirstValue.Properties.isJoinable(OutVal.Properties)) in pickVPHILoc()
2801 if (OutVal.isUnjoinedPHI()) { in pickVPHILoc()
2806 DbgOpID OutValOp = OutVal.getDbgOpID(Idx); in pickVPHILoc()
2855 const DbgValue &OutVal = *OutValIt->second; in pickOperandPHILoc() local
2856 DbgOpID OutValOpID = OutVal.getDbgOpID(DbgOpIdx); in pickOperandPHILoc()
2865 if (OutVal.Kind == DbgValue::Def || in pickOperandPHILoc()
2866 (OutVal.Kind == DbgValue::VPHI && OutVal.BlockNo != MBB.getNumber() && in pickOperandPHILoc()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 390 SDValue OutVal = OutVals[i]; in LowerReturn() local
397 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
400 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
403 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
416 OutVal = SDValue(DAG.getMachineNode(TargetOpcode::INSERT_SUBREG, DL, in LowerReturn()
417 MVT::i64, Undef, OutVal, Sub_f32), in LowerReturn()
425 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag); in LowerReturn()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 365 SDValue OutVal = OutVals[i]; in LowerReturn_64() local
371 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
374 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
377 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
386 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal, in LowerReturn_64()
393 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV); in LowerReturn_64()
399 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag); in LowerReturn_64()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1593 SDValue OutVal = N->getOperand(3); in PerformDAGCombine() local
1595 if (OutVal.hasOneUse()) { in PerformDAGCombine()
1596 unsigned BitWidth = OutVal.getValueSizeInBits(); in PerformDAGCombine()
1602 if (TLI.ShrinkDemandedConstant(OutVal, DemandedMask, TLO) || in PerformDAGCombine()
1603 TLI.SimplifyDemandedBits(OutVal, DemandedMask, Known, TLO)) in PerformDAGCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 1055 SDValue &OutVal = OutVals[I]; in LowerCall() local
1075 Chain, DL, FINode, OutVal, SizeNode, Out.Flags.getNonZeroByValAlign(), in LowerCall()
1078 OutVal = FINode; in LowerCall()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2872 SDValue OutVal = OutVals[i]; in LowerReturn() local
2879 } else if (OutVal.getValueSizeInBits() < 16) { in LowerReturn()
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