| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 205 int64_t Offset1 = 0; in getHazardType() local
211 Ptr1 = GetPointerBaseWithConstantOffset(BaseVal1, Offset1, DL, true); in getHazardType()
213 return CheckOffsets(Offset0, Offset1); in getHazardType()
223 Offset1 = MF.getFrameInfo().getObjectOffset(FS1->getFrameIndex()); in getHazardType()
224 return CheckOffsets(Offset0, Offset1); in getHazardType()
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| H A D | ARMBaseInstrInfo.h | 247 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
259 int64_t Offset1, int64_t Offset2,
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| H A D | ARMBaseInstrInfo.cpp | 1948 int64_t &Offset1, in areLoadsFromSameBasePtr() argument
2009 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr()
2029 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
2034 assert(Offset2 > Offset1); in shouldScheduleLoadsNear()
2036 if ((Offset2 - Offset1) / 8 > 64) in shouldScheduleLoadsNear()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.h | 158 bool isDSOffset2Legal(SDValue Base, unsigned Offset0, unsigned Offset1,
162 SDValue &Offset1) const;
164 SDValue &Offset1) const;
166 SDValue &Offset1, unsigned Size) const;
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| H A D | AMDGPUISelDAGToDAG.cpp | 1128 unsigned Offset1, in isDSOffset2Legal() argument
1130 if (Offset0 % Size != 0 || Offset1 % Size != 0) in isDSOffset2Legal()
1132 if (!isUInt<8>(Offset0 / Size) || !isUInt<8>(Offset1 / Size)) in isDSOffset2Legal()
1147 SDValue &Offset1) const { in SelectDS64Bit4ByteAligned()
1148 return SelectDSReadWrite2(Addr, Base, Offset0, Offset1, 4); in SelectDS64Bit4ByteAligned()
1153 SDValue &Offset1) const { in SelectDS128Bit8ByteAligned()
1154 return SelectDSReadWrite2(Addr, Base, Offset0, Offset1, 8); in SelectDS128Bit8ByteAligned()
1158 SDValue &Offset0, SDValue &Offset1, in SelectDSReadWrite2() argument
1173 Offset1 = CurDAG->getTargetConstant(OffsetValue1 / Size, DL, MVT::i8); in SelectDSReadWrite2()
1209 Offset1 = CurDAG->getTargetConstant(OffsetValue1 / Size, DL, MVT::i8); in SelectDSReadWrite2()
[all …]
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| H A D | AMDGPUInstructionSelector.h | 237 bool isDSOffset2Legal(Register Base, int64_t Offset0, int64_t Offset1,
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| H A D | SIInstrInfo.h | 192 int64_t &Offset1) const override;
205 int64_t Offset1, unsigned NumLoads) const override;
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| H A D | SIInstrInfo.cpp | 174 int64_t &Offset1) const { in areLoadsFromSameBasePtr()
210 Offset1 = cast<ConstantSDNode>(Load1->getOperand(Offset1Idx))->getZExtValue(); in areLoadsFromSameBasePtr()
242 Offset1 = Load1Offset->getZExtValue(); in areLoadsFromSameBasePtr()
275 Offset1 = cast<ConstantSDNode>(Off1)->getZExtValue(); in areLoadsFromSameBasePtr()
333 unsigned Offset1 = Offset1Op->getImm(); in getMemOperandsWithOffsetWidth() local
334 if (Offset0 + 1 != Offset1) in getMemOperandsWithOffsetWidth()
525 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear() argument
527 assert(Offset1 > Offset0 && in shouldScheduleLoadsNear()
533 return (NumLoads <= 16 && (Offset1 - Offset0) < 64); in shouldScheduleLoadsNear()
3274 int64_t Offset0, Offset1; in checkInstOffsetsDoNotOverlap() local
[all …]
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| H A D | AMDGPUInstructionSelector.cpp | 1546 unsigned Offset1 = WaveRelease | (WaveDone << 1) | (Instruction << 4); in selectDSOrderedIntrinsic() local
1549 Offset1 |= (CountDw - 1) << 6; in selectDSOrderedIntrinsic()
1552 Offset1 |= ShaderType << 2; in selectDSOrderedIntrinsic()
1554 unsigned Offset = Offset0 | (Offset1 << 8); in selectDSOrderedIntrinsic()
4277 int64_t Offset1, in isDSOffset2Legal() argument
4279 if (Offset0 % Size != 0 || Offset1 % Size != 0) in isDSOffset2Legal()
4281 if (!isUInt<8>(Offset0 / Size) || !isUInt<8>(Offset1 / Size)) in isDSOffset2Legal()
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| H A D | SILoadStoreOptimizer.cpp | 2056 uint64_t Offset1 = Src1->getImm(); in processBaseWithConstOffset() local
2063 Addr.Offset = (*Offset0P & 0x00000000ffffffff) | (Offset1 << 32); in processBaseWithConstOffset()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 668 APInt Offset1(DL.getIndexTypeSizeInBits(Load1Ptr->getType()), 0); in foldLoadsRecursive() local
670 Load1Ptr->stripAndAccumulateConstantOffsets(DL, Offset1, in foldLoadsRecursive()
710 if (Offset2.slt(Offset1)) { in foldLoadsRecursive()
713 std::swap(Offset1, Offset2); in foldLoadsRecursive()
745 if ((Shift2 - Shift1) != ShiftDiff || (Offset2 - Offset1) != PrevSize) in foldLoadsRecursive()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 246 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local
247 if (!TII->areLoadsFromSameBasePtr(Base, User, Offset1, Offset2) || in ClusterNeighboringLoads()
248 Offset1 == Offset2 || in ClusterNeighboringLoads()
254 if (O2SMap.insert(std::make_pair(Offset1, Base)).second) in ClusterNeighboringLoads()
255 Offsets.push_back(Offset1); in ClusterNeighboringLoads()
258 if (Offset2 < Offset1) in ClusterNeighboringLoads()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 400 int64_t Offset1, Offset2; in ConsecutiveInstr() local
401 if (!GetImm(MI1, 2, Offset1)) in ConsecutiveInstr()
409 return ((Offset1 == (Offset2 - 4)) && (ConsecutiveRegisters(Reg1, Reg2))); in ConsecutiveInstr()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 410 int64_t Offset1; in apply() local
412 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply()
418 if (((Offset0 ^ Offset1) & 0x18) != 0) in apply()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 436 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
454 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Scalar/ |
| H A D | ConstraintElimination.cpp | 432 int64_t Offset1 = ADec.Offset; in getConstraint() local
434 Offset1 *= -1; in getConstraint()
483 if (AddOverflow(Offset1, Offset2, OffsetSum)) in getConstraint()
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| H A D | SeparateConstOffsetFromGEP.cpp | 1358 Value *Offset1 = First->getOperand(1); in swapGEPOperand() local
1361 Second->setOperand(1, Offset1); in swapGEPOperand()
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| /openbsd-src/gnu/llvm/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | ContainerModeling.cpp | 125 SymbolRef Offset1,
959 SymbolRef Offset1, in invalidateIteratorPositions() argument
964 return compare(State, Pos.getOffset(), Offset1, Opc1) && in invalidateIteratorPositions()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1361 int64_t &Offset1, in areLoadsFromSameBasePtr() argument
1375 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 3311 int64_t Offset1, unsigned Opcode1, int FI2, in shouldClusterFI() argument
3328 ObjectOffset1 += Offset1; in shouldClusterFI()
3378 int64_t Offset1 = FirstLdSt.getOperand(2).getImm(); in shouldClusterMemOps() local
3379 if (hasUnscaledLdStOffset(FirstOpc) && !scaleOffset(FirstOpc, Offset1)) in shouldClusterMemOps()
3387 if (Offset1 > 63 || Offset1 < -64) in shouldClusterMemOps()
3393 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) && in shouldClusterMemOps()
3398 return shouldClusterFI(MFI, BaseOp1.getIndex(), Offset1, FirstOpc, in shouldClusterMemOps()
3402 assert(Offset1 <= Offset2 && "Caller should have ordered offsets."); in shouldClusterMemOps()
3404 return Offset1 + 1 == Offset2; in shouldClusterMemOps()
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| /openbsd-src/gnu/llvm/llvm/lib/Analysis/ |
| H A D | ConstantFolding.cpp | 1307 APInt Offset1(IndexWidth, 0); in ConstantFoldCompareInstOperands() local
1309 Ops1->stripAndAccumulateInBoundsConstantOffsets(DL, Offset1); in ConstantFoldCompareInstOperands()
1314 ConstantInt::get(CE0->getContext(), Offset1)); in ConstantFoldCompareInstOperands()
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| H A D | ValueTracking.cpp | 7502 APInt Offset1(DL.getIndexTypeSizeInBits(Ptr1->getType()), 0); in isPointerOffset() local
7504 Ptr1 = Ptr1->stripAndAccumulateConstantOffsets(DL, Offset1, true); in isPointerOffset()
7509 return Offset2.getSExtValue() - Offset1.getSExtValue(); in isPointerOffset()
7534 Offset1.getSExtValue(); in isPointerOffset()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 795 int64_t Offset1, Offset2; in addLoopCarriedDependences() local
797 if (TII->getMemOperandWithOffset(LdMI, BaseOp1, Offset1, in addLoopCarriedDependences()
803 (int)Offset1 < (int)Offset2) { in addLoopCarriedDependences()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 1153 const APInt *Offset1 = nullptr, *Offset2 = nullptr; in foldAndOrOfICmpsUsingRanges() local
1156 if (match(V1, m_Add(m_Value(X), m_APInt(Offset1)))) in foldAndOrOfICmpsUsingRanges()
1167 if (Offset1) in foldAndOrOfICmpsUsingRanges()
1168 CR1 = CR1.subtract(*Offset1); in foldAndOrOfICmpsUsingRanges()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2941 int64_t Offset1 = 0, Offset2 = 0; in shouldClusterMemOps() local
2944 if (!getMemOperandWithOffsetWidth(FirstLdSt, Base1, Offset1, Width1, TRI) || in shouldClusterMemOps()
2952 assert(Offset1 <= Offset2 && "Caller should have ordered offsets."); in shouldClusterMemOps()
2953 return Offset1 + Width1 == Offset2; in shouldClusterMemOps()
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