| /openbsd-src/gnu/llvm/llvm/lib/MC/ |
| H A D | MCInstrDesc.cpp | 34 for (MCPhysReg ImpDef : implicit_defs()) in hasImplicitDefOfPhysReg() local
35 if (ImpDef == Reg || (MRI && MRI->isSubRegister(Reg, ImpDef))) in hasImplicitDefOfPhysReg()
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| /openbsd-src/gnu/llvm/llvm/tools/llvm-reduce/deltas/ |
| H A D | ReduceRegisterDefs.cpp | 99 unsigned ImpDef = IsGeneric ? TargetOpcode::G_IMPLICIT_DEF in removeDefsFromFunction() local
103 InsPt = BuildMI(MBB, InsPt, DebugLoc(), TII->get(ImpDef)) in removeDefsFromFunction()
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| H A D | ReduceInstructionsMIR.cpp | 130 unsigned ImpDef = IsGeneric ? TargetOpcode::G_IMPLICIT_DEF in extractInstrFromFunction() local
137 BuildMI(*EntryMBB, EntryInsPt, DebugLoc(), TII->get(ImpDef)) in extractInstrFromFunction()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | RenameIndependentSubregs.cpp | 333 MachineInstrBuilder ImpDef = BuildMI(*PredMBB, InsertPos, in computeMainRangesFixFlags() local
335 SlotIndex DefIdx = LIS->InsertMachineInstrInMaps(*ImpDef); in computeMainRangesFixFlags()
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| H A D | MachineInstr.cpp | 87 for (MCPhysReg ImpDef : MCID->implicit_defs()) in addImplicitDefUseOperands() local
88 addOperand(MF, MachineOperand::CreateReg(ImpDef, true, true)); in addImplicitDefUseOperands()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86FixupGadgets.cpp | 546 for (MCPhysReg ImpDef : ImpDefs) { in hasImplicitUseOrDef() local
547 unsigned w = getWidestRegForReg(ImpDef); in hasImplicitUseOrDef()
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| H A D | X86InstrInfo.cpp | 1173 MachineInstr *ImpDef = in convertToThreeAddressWithLEA() local
1262 LIS->InsertMachineInstrInMaps(*ImpDef); in convertToThreeAddressWithLEA()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGFast.cpp | 432 for (MCPhysReg ImpDef : MCID.implicit_defs()) { in getPhysicalRegisterVT() local
433 if (Reg == ImpDef) in getPhysicalRegisterVT()
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| H A D | ScheduleDAGRRList.cpp | 1290 for (MCPhysReg ImpDef : MCID.implicit_defs()) { in getPhysicalRegisterVT() local
1291 if (Reg == ImpDef) in getPhysicalRegisterVT()
2885 for (MCPhysReg ImpDef : ImpDefs) { in canClobberReachingPhysRegUse() local
2889 if (TRI->regsOverlap(ImpDef, SuccPred.getReg()) && in canClobberReachingPhysRegUse()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 959 for (unsigned ImpDef : ImpDefs) in MergeOpsUpdate() local
960 MIB.addReg(ImpDef, RegState::ImplicitDefine); in MergeOpsUpdate()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 480 MachineSDNode *ImpDef = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, in SelectBuildVector() local
485 RegSeqArgs[1 + (2 * i)] = SDValue(ImpDef, 0); in SelectBuildVector()
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| H A D | SIInstrInfo.cpp | 5575 bool ImpDef = Def->isImplicitDef(); in legalizeGenericOperand() local
5576 while (!ImpDef && Def && Def->isCopy()) { in legalizeGenericOperand()
5580 ImpDef = Def && Def->isImplicitDef(); in legalizeGenericOperand()
5583 !ImpDef) in legalizeGenericOperand()
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| H A D | SIISelLowering.cpp | 11978 SDValue ImpDef = DAG.getCopyToReg(DAG.getEntryNode(), SDLoc(Node), in PostISelFolding() local
12003 Ops.push_back(ImpDef.getValue(1)); in PostISelFolding()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 1422 for (MCPhysReg ImpDef : MCID.implicit_defs()) in verifyImplicitOperands() local
1423 ImplicitOperands.push_back(MachineOperand::CreateReg(ImpDef, true, true)); in verifyImplicitOperands()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2743 for (MCPhysReg ImpDef : NewDesc.implicit_defs()) { in optimizeCompareInstr() local
2744 if (!MI->definesRegister(ImpDef)) { in optimizeCompareInstr()
2746 MachineOperand::CreateReg(ImpDef, true, true)); in optimizeCompareInstr()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1223 SDValue ImpDef = SDValue( in Widen() local
1226 TargetOpcode::INSERT_SUBREG, dl, MVT::i64, ImpDef, N, SubReg); in Widen()
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