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Searched refs:HasBaseReg (Results 1 – 25 of 30) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86AsmPrinter.cpp380 bool HasBaseReg = BaseReg.getReg() != 0; in PrintLeaMemReference() local
381 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") && in PrintLeaMemReference()
383 HasBaseReg = false; in PrintLeaMemReference()
386 bool HasParenPart = IndexReg.getReg() || HasBaseReg; in PrintLeaMemReference()
411 if (HasBaseReg) in PrintLeaMemReference()
478 bool HasBaseReg = BaseReg.getReg() != 0; in PrintIntelMemReference() local
479 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") && in PrintIntelMemReference()
481 HasBaseReg = false; in PrintIntelMemReference()
486 HasBaseReg = false; in PrintIntelMemReference()
498 if (HasBaseReg) { in PrintIntelMemReference()
[all …]
H A DX86TargetTransformInfo.h236 int64_t BaseOffset, bool HasBaseReg,
H A DX86TargetTransformInfo.cpp6650 bool HasBaseReg, int64_t Scale, in getScalingFactorCost() argument
6673 AM.HasBaseReg = HasBaseReg; in getScalingFactorCost()
/openbsd-src/gnu/llvm/llvm/lib/Transforms/Scalar/
H A DLoopStrengthReduce.cpp362 bool HasBaseReg = false; member
482 HasBaseReg = true; in initialMatch()
488 HasBaseReg = true; in initialMatch()
638 if (HasBaseReg && BaseRegs.empty()) { in print()
641 } else if (!HasBaseReg && !BaseRegs.empty()) { in print()
1258 bool HasBaseReg, int64_t Scale,
1423 Offset, F.HasBaseReg, F.Scale, Fixup.UserInst)) in RateFormula()
1677 bool HasBaseReg, int64_t Scale, in isAMCompletelyFolded() argument
1682 HasBaseReg, Scale, AccessTy.AddrSpace, Fixup); in isAMCompletelyFolded()
1691 if (Scale != 0 && HasBaseReg && BaseOffset != 0) in isAMCompletelyFolded()
[all …]
/openbsd-src/gnu/llvm/llvm/include/llvm/Analysis/
H A DTargetTransformInfoImpl.h210 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
304 int64_t BaseOffset, bool HasBaseReg, in getScalingFactorCost() argument
308 if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale, in getScalingFactorCost()
968 bool HasBaseReg = (BaseGV == nullptr); in getGEPCost() local
1017 BaseOffset.sextOrTrunc(64).getSExtValue(), HasBaseReg, Scale, in getGEPCost()
H A DTargetTransformInfo.h604 bool HasBaseReg, int64_t Scale,
708 int64_t BaseOffset, bool HasBaseReg,
1633 int64_t BaseOffset, bool HasBaseReg,
1669 bool HasBaseReg, int64_t Scale,
2049 bool HasBaseReg, int64_t Scale, unsigned AddrSpace, in isLegalAddressingMode() argument
2051 return Impl.isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale, in isLegalAddressingMode()
2128 int64_t BaseOffset, bool HasBaseReg, in getScalingFactorCost() argument
2131 return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg, Scale, in getScalingFactorCost()
/openbsd-src/gnu/llvm/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp356 bool HasBaseReg, int64_t Scale, in isLegalAddressingMode() argument
359 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, in isLegalAddressingMode()
469 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, in getScalingFactorCost() argument
472 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); in getScalingFactorCost()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h329 bool HasBaseReg, int64_t Scale,
334 AM.HasBaseReg = HasBaseReg;
384 int64_t BaseOffset, bool HasBaseReg, in getScalingFactorCost() argument
389 AM.HasBaseReg = HasBaseReg; in getScalingFactorCost()
H A DTargetLowering.h2595 bool HasBaseReg = false; member
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.h390 int64_t BaseOffset, bool HasBaseReg,
H A DAArch64TargetTransformInfo.cpp3386 int64_t BaseOffset, bool HasBaseReg, in getScalingFactorCost() argument
3398 AM.HasBaseReg = HasBaseReg; in getScalingFactorCost()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.h297 int64_t BaseOffset, bool HasBaseReg,
H A DARMTargetTransformInfo.cpp2430 bool HasBaseReg, int64_t Scale, in getScalingFactorCost() argument
2435 AM.HasBaseReg = HasBaseReg; in getScalingFactorCost()
H A DARMISelLowering.cpp19400 if (!AM.HasBaseReg && Scale == 2) in isLegalT2ScaledAddressingMode()
19426 return (Scale == 1) || (!AM.HasBaseReg && Scale == 2); in isLegalT1ScaledAddressingMode()
19473 if (Scale == 1 || (AM.HasBaseReg && Scale == -1)) in isLegalAddressingMode()
19476 if (!AM.HasBaseReg && Scale == 2) in isLegalAddressingMode()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUPerfHintAnalysis.cpp262 AM.HasBaseReg = !AM.BaseGV; in visit()
H A DSILoadStoreOptimizer.cpp2174 AM.HasBaseReg = true; in promoteConstantOffsetToImm()
2199 AM.HasBaseReg = true; in promoteConstantOffsetToImm()
H A DSIISelLowering.cpp1291 if (AM.HasBaseReg) { in isLegalMUBUFAddressingMode()
1349 if (AM.Scale == 1 && AM.HasBaseReg) in isLegalAddressingMode()
1368 if (AM.Scale == 1 && AM.HasBaseReg) in isLegalAddressingMode()
9476 AM.HasBaseReg = true; in performSHLPtrCombine()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp3624 !NewAddrMode.HasBaseReg); in addNewAddrMode()
4766 if (AddrMode.HasBaseReg) { in matchOperationAddr()
4771 AddrMode.HasBaseReg = true; in matchOperationAddr()
4782 if (AddrMode.HasBaseReg) in matchOperationAddr()
4784 AddrMode.HasBaseReg = true; in matchOperationAddr()
4918 if (!AddrMode.HasBaseReg) { in matchAddr()
4919 AddrMode.HasBaseReg = true; in matchAddr()
4924 AddrMode.HasBaseReg = false; in matchAddr()
H A DTargetLoweringBase.cpp1938 if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed. in isLegalAddressingMode()
1943 if (AM.HasBaseReg || AM.BaseOffs) // 2*r+r or 2*r+i is not allowed. in isLegalAddressingMode()
/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp874 if (!AM.HasBaseReg) // allow "r+i". in isLegalAddressingMode()
/openbsd-src/gnu/llvm/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1014 if (AM.BaseGV && !AM.HasBaseReg && AM.Scale == 0 && Offs == 0) { in isLegalAddressingMode()
1026 if (AM.BaseGV == nullptr && AM.HasBaseReg && AM.Scale == 0 && in isLegalAddressingMode()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp1394 AMNew.HasBaseReg = true; in matchPtrAddImmedChain()
1397 AMOld.HasBaseReg = true; in matchPtrAddImmedChain()
4560 AM.HasBaseReg = true; in reassociationCanBreakAddressingModePattern()
/openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp4543 return !AM.BaseOffs && !AM.HasBaseReg && !AM.Scale; in isLegalAddressingMode()
4550 if (AM.HasBaseReg) // "r+r+i" or "r+r" is not allowed. in isLegalAddressingMode()
/openbsd-src/gnu/llvm/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1884 return Size >= 4 && !AM.HasBaseReg && AM.Scale == 0 && in isLegalAddressingMode()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp4306 if (!AM.HasBaseReg) // allow "r+i". in isLegalAddressingMode()

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