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Searched refs:CmpInstr (Results 1 – 13 of 13) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp284 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, in optimizeCompareInstr() argument
293 MachineBasicBlock::iterator I = CmpInstr, E = MI, in optimizeCompareInstr()
294 B = CmpInstr.getParent()->begin(); in optimizeCompareInstr()
308 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
312 if (CmpInstr.getOpcode() == Lanai::SFSUB_F_RI_LO) in optimizeCompareInstr()
331 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &*I)) { in optimizeCompareInstr()
354 I = CmpInstr; in optimizeCompareInstr()
355 E = CmpInstr.getParent()->end(); in optimizeCompareInstr()
421 MachineBasicBlock *MBB = CmpInstr.getParent(); in optimizeCompareInstr()
430 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
H A DLanaiInstrInfo.h105 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h248 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
360 bool substituteCmpToZero(MachineInstr &CmpInstr, unsigned SrcReg,
362 bool removeCmpToZeroOrOne(MachineInstr &CmpInstr, unsigned SrcReg,
399 examineCFlagsUse(MachineInstr &MI, MachineInstr &CmpInstr,
H A DAArch64InstrInfo.cpp1461 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
1463 assert(CmpInstr.getParent()); in optimizeCompareInstr()
1467 int DeadNZCVIdx = CmpInstr.findRegisterDefOperandIdx(AArch64::NZCV, true); in optimizeCompareInstr()
1469 if (CmpInstr.definesRegister(AArch64::WZR) || in optimizeCompareInstr()
1470 CmpInstr.definesRegister(AArch64::XZR)) { in optimizeCompareInstr()
1471 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
1474 unsigned Opc = CmpInstr.getOpcode(); in optimizeCompareInstr()
1475 unsigned NewOpc = convertToNonFlagSettingOpc(CmpInstr); in optimizeCompareInstr()
1479 CmpInstr.setDesc(MCID); in optimizeCompareInstr()
1480 CmpInstr.removeOperand(DeadNZCVIdx); in optimizeCompareInstr()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp3028 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
3041 if (UI->getParent() != CmpInstr.getParent()) in optimizeCompareInstr()
3055 MachineBasicBlock::iterator I = CmpInstr, E = MI, in optimizeCompareInstr()
3056 B = CmpInstr.getParent()->begin(); in optimizeCompareInstr()
3070 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
3075 if (CmpInstr.getOpcode() == ARM::CMPri || in optimizeCompareInstr()
3076 CmpInstr.getOpcode() == ARM::t2CMPri || in optimizeCompareInstr()
3077 CmpInstr.getOpcode() == ARM::tCMPi8) in optimizeCompareInstr()
3112 E = CmpInstr; in optimizeCompareInstr()
3113 CmpInstr.getParent()->insert(E, MI); in optimizeCompareInstr()
[all …]
H A DARMBaseInstrInfo.h299 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp971 static bool findRedundantFlagInstr(MachineInstr &CmpInstr, in findRedundantFlagInstr() argument
980 if (CmpInstr.getOpcode() != X86::TEST64rr) in findRedundantFlagInstr()
986 (CmpInstr.getOperand(0).getReg() == CmpInstr.getOperand(1).getReg()) && in findRedundantFlagInstr()
995 (MRI->getVRegDef(CmpInstr.getOperand(0).getReg()) == &CmpValDefInstr) && in findRedundantFlagInstr()
4311 bool X86InstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
4316 switch (CmpInstr.getOpcode()) { in optimizeCompareInstr()
4333 if (!MRI->use_nodbg_empty(CmpInstr.getOperand(0).getReg())) in optimizeCompareInstr()
4337 switch (CmpInstr.getOpcode()) { in optimizeCompareInstr()
4355 CmpInstr.setDesc(get(NewOpcode)); in optimizeCompareInstr()
4356 CmpInstr.removeOperand(0); in optimizeCompareInstr()
[all …]
H A DX86InstrInfo.h532 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp2386 bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
2393 int OpC = CmpInstr.getOpcode(); in optimizeCompareInstr()
2394 Register CRReg = CmpInstr.getOperand(0).getReg(); in optimizeCompareInstr()
2469 MachineBasicBlock::iterator I = CmpInstr; in optimizeCompareInstr()
2472 for (MachineBasicBlock::iterator EL = CmpInstr.getParent()->end(); I != EL; in optimizeCompareInstr()
2501 else if (MI->getParent() != CmpInstr.getParent()) in optimizeCompareInstr()
2547 CmpInstr.getOperand(2).setImm(0); in optimizeCompareInstr()
2554 MachineBasicBlock::iterator E = MI, B = CmpInstr.getParent()->begin(); in optimizeCompareInstr()
2560 if (&*I != &CmpInstr && (Instr.modifiesRegister(PPC::CR0, TRI) || in optimizeCompareInstr()
2674 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
H A DPPCInstrInfo.h654 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1606 virtual bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h330 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
H A DSIInstrInfo.cpp8563 bool SIInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
8573 const auto optimizeCmpAnd = [&CmpInstr, SrcReg, CmpValue, MRI, in optimizeCompareInstr()
8600 if (!Def || Def->getParent() != CmpInstr.getParent()) in optimizeCompareInstr()
8644 for (auto I = std::next(Def->getIterator()), E = CmpInstr.getIterator(); in optimizeCompareInstr()
8653 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
8676 switch (CmpInstr.getOpcode()) { in optimizeCompareInstr()