| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ConditionOptimizer.cpp | 152 if (Term->getOpcode() != AArch64::Bcc) in findSuitableCompare()
293 BuildMI(*MBB, BrMI, BrMI.getDebugLoc(), TII->get(AArch64::Bcc)) in modifyCmp()
|
| H A D | AArch64AsmPrinter.cpp | 397 MCInstBuilder(AArch64::Bcc) in LowerKCFI_CHECK()
521 MCInstBuilder(AArch64::Bcc) in emitHwasanMemaccessSymbols()
546 MCInstBuilder(AArch64::Bcc) in emitHwasanMemaccessSymbols()
561 MCInstBuilder(AArch64::Bcc) in emitHwasanMemaccessSymbols()
586 MCInstBuilder(AArch64::Bcc) in emitHwasanMemaccessSymbols()
610 MCInstBuilder(AArch64::Bcc) in emitHwasanMemaccessSymbols()
|
| H A D | AArch64CondBrTuning.cpp | 135 return BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(AArch64::Bcc)) in convertToCondBr()
|
| H A D | AArch64MacroFusion.cpp | 24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
|
| H A D | AArch64RedundantCopyElimination.cpp | 140 if (Opc != AArch64::Bcc) in knownRegValInBlock()
|
| H A D | AArch64InstrInfo.h | 465 case AArch64::Bcc: in isCondBranchOpcode()
|
| H A D | AArch64ConditionalCompares.cpp | 707 BuildMI(*Head, CmpMI, CmpMI->getDebugLoc(), TII->get(AArch64::Bcc)) in convert()
|
| H A D | AArch64InstrInfo.cpp | 160 case AArch64::Bcc: in parseCondBranch()
201 case AArch64::Bcc: in getBranchDisplacementBits()
230 case AArch64::Bcc: in getBranchDestBlock()
485 BuildMI(&MBB, DL, get(AArch64::Bcc)).addImm(Cond[0].getImm()).addMBB(TBB); in instantiateCondBranch()
1570 case AArch64::Bcc: { in findCondCodeUseOperandIdxForBranchOrSelect()
6842 case AArch64::Bcc: in optimizeCondBranch()
6965 BuildMI(RefToMBB, MI, DL, get(AArch64::Bcc)).addImm(CC).addMBB(TBB); in optimizeCondBranch()
|
| H A D | AArch64FastISel.cpp | 2449 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::Bcc)) in selectBranch()
2455 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::Bcc)) in selectBranch()
2486 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::Bcc)) in selectBranch()
|
| H A D | AArch64ExpandPseudoInsts.cpp | 227 BuildMI(LoadCmpBB, MIMD, TII->get(AArch64::Bcc)) in expandCMP_SWAP()
|
| H A D | AArch64SchedExynosM3.td | 494 def : InstRW<[M3WriteB1], (instrs Bcc)>;
|
| H A D | AArch64SchedAmpere1.td | 692 def : InstRW<[Ampere1Write_1cyc_1A], (instrs Bcc, BL, RET)>;
|
| H A D | AArch64SchedExynosM4.td | 592 def : InstRW<[M4WriteB1], (instrs Bcc)>;
|
| H A D | AArch64SchedExynosM5.td | 627 def : InstRW<[M5WriteB1], (instrs Bcc)>;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARC/ |
| H A D | ARCBranchFinalize.cpp | 137 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII->get(ARC::Bcc)) in replaceWithCmpBcc()
|
| H A D | ARCInstrInfo.td | 434 def Bcc : F32_BR0_COND<(outs), (ins btargetS21:$S21, ccond:$cc),
447 // Compare and branch (BRcc), or into CMP + Bcc.
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMMCInstLower.cpp | 207 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::Bcc).addImm(20) in EmitSled()
|
| H A D | ARMInstructionSelector.cpp | 118 unsigned Bcc; member
329 STORE_OPCODE(Bcc, Bcc); in OpcodeCache()
1134 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opcodes.Bcc)) in select()
|
| H A D | ARMExpandPseudoInsts.cpp | 1780 unsigned Bcc = IsThumb ? ARM::tBcc : ARM::Bcc; in ExpandCMP_SWAP() local
1781 BuildMI(LoadCmpBB, DL, TII->get(Bcc)) in ExpandCMP_SWAP()
1805 BuildMI(StoreBB, DL, TII->get(Bcc)) in ExpandCMP_SWAP()
1903 unsigned Bcc = IsThumb ? ARM::tBcc : ARM::Bcc; in ExpandCMP_SWAP_64() local
1904 BuildMI(LoadCmpBB, DL, TII->get(Bcc)) in ExpandCMP_SWAP_64()
1926 BuildMI(StoreBB, DL, TII->get(Bcc)) in ExpandCMP_SWAP_64()
|
| H A D | ARMBaseInstrInfo.h | 641 return Opc == ARM::Bcc || Opc == ARM::tBcc || Opc == ARM::t2Bcc; in isCondBranchOpcode()
|
| H A D | ARMFastISel.cpp | 1252 unsigned BrOpc = isThumb2 ? ARM::t2Bcc : ARM::Bcc; in SelectBranch()
1275 unsigned BrOpc = isThumb2 ? ARM::t2Bcc : ARM::Bcc; in SelectBranch()
1313 unsigned BrOpc = isThumb2 ? ARM::t2Bcc : ARM::Bcc; in SelectBranch()
|
| H A D | ARMAsmPrinter.cpp | 1484 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::Bcc) in emitInstruction()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kInstrControl.td | 15 /// BRA [x] BSR [ ] Bcc [~] DBcc [ ] FBcc [ ]
65 /// *Not applicable to the Bcc instructions.
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCTargetDesc.cpp | 406 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL) in isUnconditionalBranch()
413 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL) in isConditionalBranch()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1630 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC1).addMBB(DestMBB); in selectCompareBranchFedByFCmp()
1632 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC2).addMBB(DestMBB); in selectCompareBranchFedByFCmp()
1745 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC).addMBB(DestMBB); in selectCompareBranchFedByICmp()
1776 auto Bcc = MIB.buildInstr(AArch64::Bcc) in selectCompareBranch() local
1780 return constrainSelectedInstRegOperands(*Bcc, TII, TRI, RBI); in selectCompareBranch()
|