| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVGatherScatterLowering.cpp | 75 PHINode *&BasePtr, BinaryOperator *&Inc,
185 PHINode *&BasePtr, in matchStridedRecurrence() argument
219 BasePtr = in matchStridedRecurrence()
221 Inc = BinaryOperator::CreateAdd(BasePtr, Step, Inc->getName() + ".scalar", in matchStridedRecurrence()
223 BasePtr->addIncoming(Start, Phi->getIncomingBlock(1 - IncrementingBlock)); in matchStridedRecurrence()
224 BasePtr->addIncoming(Inc, Phi->getIncomingBlock(IncrementingBlock)); in matchStridedRecurrence()
275 if (!matchStridedRecurrence(Index, L, Stride, BasePtr, Inc, Builder)) in matchStridedRecurrence()
279 unsigned StepIndex = Inc->getOperand(0) == BasePtr ? 1 : 0; in matchStridedRecurrence()
280 unsigned StartBlock = BasePtr->getOperand(0) == Inc ? 1 : 0; in matchStridedRecurrence()
282 Value *Start = BasePtr->getOperand(StartBlock); in matchStridedRecurrence()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.cpp | 52 BasePtr = M68k::A4; in M68kRegisterInfo()
183 unsigned BasePtr; in eliminateFrameIndex() local
185 BasePtr = (FIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex()
187 BasePtr = (FIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex()
189 BasePtr = StackPtr; in eliminateFrameIndex()
191 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex()
193 Base.ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
207 if (BasePtr == StackPtr) in eliminateFrameIndex()
257 return MRI->canReserveReg(BasePtr); in canRealignStack()
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| H A D | M68kRegisterInfo.h | 42 unsigned BasePtr; variable
109 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 70 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo()
75 BasePtr = X86::ESI; in X86RegisterInfo()
570 Register BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs() local
571 for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr)) in getReservedRegs()
741 return MRI->canReserveReg(BasePtr); in canRealignStack()
759 Register BasePtr = MI.getOperand(1).getReg(); in tryOptimizeLEAtoMOV() local
764 BasePtr = getX86SubSuperRegister(BasePtr, 32); in tryOptimizeLEAtoMOV()
768 TII->copyPhysReg(*MI.getParent(), II, MI.getDebugLoc(), NewDestReg, BasePtr, in tryOptimizeLEAtoMOV()
800 Register BasePtr; in eliminateFrameIndex() local
806 TFI->getFrameIndexReferenceSP(MF, FrameIndex, BasePtr, 0).getFixed(); in eliminateFrameIndex()
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| H A D | X86RegisterInfo.h | 49 unsigned BasePtr; variable
151 Register getBaseRegister() const { return BasePtr; } in getBaseRegister()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULowerKernelAttributes.cpp | 326 Function *BasePtr = getBasePtrIntrinsic(M, IsV5OrAbove); in runOnModule() local
328 if (!BasePtr) // ImplicitArgPtr/DispatchPtr not used. in runOnModule()
332 for (auto *U : BasePtr->users()) { in runOnModule()
358 Function *BasePtr = getBasePtrIntrinsic(*F.getParent(), IsV5OrAbove); in run() local
360 if (!BasePtr) // ImplicitArgPtr/DispatchPtr not used. in run()
365 if (CI->getCalledFunction() == BasePtr) in run()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | MVEGatherScatterLowering.cpp | 141 Instruction *tryCreateIncrementingWBGatScat(IntrinsicInst *I, Value *BasePtr,
247 Value *BasePtr = Builder.CreateIntToPtr(Zero, Builder.getInt8PtrTy()); in decomposePtr() local
251 return BasePtr; in decomposePtr()
550 Value *BasePtr = decomposePtr( in tryCreateMaskedGatherOffset() local
552 if (!BasePtr) in tryCreateMaskedGatherOffset()
561 {ResultTy, BasePtr->getType(), Offsets->getType(), Mask->getType()}, in tryCreateMaskedGatherOffset()
562 {BasePtr, Offsets, Builder.getInt32(MemoryTy->getScalarSizeInBits()), in tryCreateMaskedGatherOffset()
567 {ResultTy, BasePtr->getType(), Offsets->getType()}, in tryCreateMaskedGatherOffset()
568 {BasePtr, Offsets, Builder.getInt32(MemoryTy->getScalarSizeInBits()), in tryCreateMaskedGatherOffset()
703 Value *BasePtr = decomposePtr( in tryCreateMaskedScatterOffset() local
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| H A D | ARMBaseRegisterInfo.h | 132 unsigned BasePtr = ARM::R6;
209 Register getBaseRegister() const { return BasePtr; } in getBaseRegister()
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| H A D | ARMBaseRegisterInfo.cpp | 213 markSuperRegs(Reserved, BasePtr); in getReservedRegs()
250 markSuperRegs(Reserved, BasePtr); in isInlineAsmReadOnlyReg()
472 return MRI->canReserveReg(BasePtr); in canRealignStack()
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| /openbsd-src/gnu/llvm/clang/lib/AST/Interp/ |
| H A D | Interp.cpp | 413 const Pointer &BasePtr, const Record *R);
416 const Pointer &BasePtr, in CheckArrayInitialized() argument
423 const Record *R = BasePtr.getElemRecord(); in CheckArrayInitialized()
425 Pointer ElemPtr = BasePtr.atIndex(I).narrow(); in CheckArrayInitialized()
430 Pointer ElemPtr = BasePtr.atIndex(I).narrow(); in CheckArrayInitialized()
435 if (!BasePtr.atIndex(I).isInitialized()) { in CheckArrayInitialized()
437 BasePtr.getFieldDesc()->getLocation()); in CheckArrayInitialized()
447 const Pointer &BasePtr, const Record *R) { in CheckFieldsInitialized() argument
452 Pointer FieldPtr = BasePtr.atField(F.Offset); in CheckFieldsInitialized()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | ShadowStackGCLowering.cpp | 82 Type *Ty, Value *BasePtr, int Idx1,
85 Type *Ty, Value *BasePtr, int Idx1, int Idx2,
263 Value *BasePtr, int Idx, in CreateGEP() argument
269 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP()
277 IRBuilder<> &B, Type *Ty, Value *BasePtr, in CreateGEP() argument
281 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP()
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| H A D | InterleavedLoadCombinePass.cpp | 868 Value *BasePtr; in computeFromLI() local
878 computePolynomialFromPointer(*LI->getPointerOperand(), Offset, BasePtr, DL); in computeFromLI()
881 Result.PV = BasePtr; in computeFromLI()
955 Value *&BasePtr, in computePolynomialFromPointer()
961 BasePtr = nullptr; in computePolynomialFromPointer()
972 computePolynomialFromPointer(*CI.getOperand(0), Result, BasePtr, DL); in computePolynomialFromPointer()
975 BasePtr = &Ptr; in computePolynomialFromPointer()
989 BasePtr = GEP.getPointerOperand(); in computePolynomialFromPointer()
1007 BasePtr = nullptr; in computePolynomialFromPointer()
1024 BasePtr = GEP.getPointerOperand(); in computePolynomialFromPointer()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 298 Register BasePtr; in eliminateFrameIndex() local
300 (TFI->getFrameIndexReference(MF, FrameIndex, BasePtr).getFixed() + in eliminateFrameIndex()
305 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false); in eliminateFrameIndex()
312 Ops, TFI->getFrameIndexReference(MF, FrameIndex, BasePtr).getFixed()); in eliminateFrameIndex()
329 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
352 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
360 .addReg(BasePtr).addImm(HighOffset).addReg(0); in eliminateFrameIndex()
366 .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg); in eliminateFrameIndex()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/ |
| H A D | MSP430RegisterInfo.cpp | 115 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::R4 : MSP430::SP); in eliminateFrameIndex() local
136 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
153 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCLoopInstrFormPrep.cpp | 356 static bool IsPtrInBounds(Value *BasePtr) { in IsPtrInBounds() argument
357 Value *StrippedBasePtr = BasePtr; in IsPtrInBounds()
658 Value *BasePtr = getPointerOperandAndType(BaseMemI); in rewriteForBase() local
659 assert(BasePtr && "No pointer operand"); in rewriteForBase()
664 BasePtr->getType()->getPointerAddressSpace()); in rewriteForBase()
732 cast<GetElementPtrInst>(PtrInc)->setIsInBounds(IsPtrInBounds(BasePtr)); in rewriteForBase()
739 if (PtrInc->getType() != BasePtr->getType()) in rewriteForBase()
741 new BitCastInst(PtrInc, BasePtr->getType(), in rewriteForBase()
759 cast<GetElementPtrInst>(PtrInc)->setIsInBounds(IsPtrInBounds(BasePtr)); in rewriteForBase()
764 if (NewPHI->getType() != BasePtr->getType()) in rewriteForBase()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 323 SDValue BasePtr = ST->getBasePtr(); in select() local
326 if (isa<FrameIndexSDNode>(BasePtr) || isa<ConstantSDNode>(BasePtr) || in select()
327 BasePtr.isUndef()) { in select()
331 const RegisterSDNode *RN = dyn_cast<RegisterSDNode>(BasePtr.getOperand(0)); in select()
337 int CST = (int)cast<ConstantSDNode>(BasePtr.getOperand(1))->getZExtValue(); in select()
342 SDValue Ops[] = {BasePtr.getOperand(0), Offset, ST->getValue(), Chain}; in select()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64StackTagging.cpp | 95 Value *BasePtr; member in __anon197fc9550111::InitializerBuilder
111 InitializerBuilder(uint64_t Size, const DataLayout *DL, Value *BasePtr, in InitializerBuilder() argument
114 : Size(Size), DL(DL), BasePtr(BasePtr), SetTagFn(SetTagFn), in InitializerBuilder()
247 Value *Ptr = BasePtr; in emitZeroes()
257 Value *Ptr = BasePtr; in emitUndef()
266 Value *Ptr = BasePtr; in emitPair()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LoadStoreOpt.h | 85 Register BasePtr;
108 BasePtr = Register(); in reset()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LoadStoreOpt.cpp | 195 Register BasePtr; in instMayAlias() member
229 if (MUC0.BasePtr.isValid() && MUC0.BasePtr == MUC1.BasePtr && in instMayAlias()
528 C.BasePtr = StoreBase; in addStoreToCandidate()
547 if (C.BasePtr != StoreBase) in addStoreToCandidate()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | VVPISelLowering.cpp | 129 SDValue BasePtr = getMemoryPtr(Op); in lowerVVP_LOAD_STORE() local
156 {Chain, BasePtr, StrideV, Mask, AVL}); in lowerVVP_LOAD_STORE()
173 {Chain, Data, BasePtr, StrideV, Mask, AVL}); in lowerVVP_LOAD_STORE()
272 SDValue BasePtr = getMemoryPtr(Op); in lowerVVP_GATHER_SCATTER() local
292 CDAG.getGatherScatterAddress(BasePtr, Scale, Index, Mask, AVL); in lowerVVP_GATHER_SCATTER()
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| H A D | VECustomDAG.cpp | 536 SDValue VECustomDAG::getGatherScatterAddress(SDValue BasePtr, SDValue Scale, in getGatherScatterAddress() argument
552 if (isNullConstant(BasePtr)) in getGatherScatterAddress()
556 SDValue BaseBroadcast = getBroadcast(IndexVT, BasePtr, AVL); in getGatherScatterAddress()
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| H A D | VECustomDAG.h | 214 SDValue getGatherScatterAddress(SDValue BasePtr, SDValue Scale, SDValue Index,
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 288 Register BasePtr = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
289 FI->setBasePointerVreg(BasePtr); in emitPrologue()
290 BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::COPY), BasePtr) in emitPrologue()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 420 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD() local
426 if (DAG.isBaseWithConstantOffset(BasePtr) && in LowerLOAD()
427 isWordAligned(BasePtr->getOperand(0), DAG)) { in LowerLOAD()
428 SDValue NewBasePtr = BasePtr->getOperand(0); in LowerLOAD()
429 Offset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue(); in LowerLOAD()
433 if (TLI.isGAPlusOffset(BasePtr.getNode(), GV, Offset) && in LowerLOAD()
436 BasePtr->getValueType(0)); in LowerLOAD()
443 SDValue Low = DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain, BasePtr, in LowerLOAD()
446 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in LowerLOAD()
467 Entry.Node = BasePtr; in LowerLOAD()
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| /openbsd-src/gnu/llvm/llvm/lib/DebugInfo/CodeView/ |
| H A D | SymbolRecordMapping.cpp | 505 case EncodedFramePtrReg::BasePtr: return RegisterId::EBX; in decodeFramePtrReg()
513 case EncodedFramePtrReg::BasePtr: return RegisterId::R13; in decodeFramePtrReg()
539 return EncodedFramePtrReg::BasePtr; in encodeFramePtrReg()
551 return EncodedFramePtrReg::BasePtr; in encodeFramePtrReg()
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