| /openbsd-src/gnu/usr.bin/binutils/gas/doc/ |
| H A D | c-a29k.texi | 7 @chapter AMD 29K Dependent Features 11 @chapter AMD 29K Dependent Features 14 @cindex AMD 29K support 20 * AMD29K Directives:: AMD 29K Machine Directives 26 @cindex AMD 29K options (none) 28 @code{@value{AS}} has no additional command-line options for the AMD 42 @cindex Macros, AMD 29K 43 @cindex AMD 29K macros 44 The macro syntax used on the AMD 29K is like that described in the AMD 51 @cindex line comment character, AMD 29K [all …]
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| H A D | c-i386.texi | 20 architecture in both 16 and 32-bit mode as well as AMD x86-64 architecture 32 * i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations 57 implies Intel i386 architecture, while 64-bit implies AMD x86-64 302 The AMD x86-64 architecture extends the register set by: 585 @section Intel's MMX and AMD's 3DNow! SIMD Operations 596 processors and Pentium II processors, AMD's K6 and K6-2 processors, 597 Cyrix' M2 processor, and probably others. It also supports AMD's 3DNow! 599 available on AMD's K6-2 processor and possibly others in the future. 610 See Intel and AMD documentation, keeping in mind that the operand order in
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| /openbsd-src/sys/dev/pci/ |
| H A D | pcidevs | 71 vendor AMD 0x1022 AMD 700 /* AMD products */ 701 product AMD 0F_HT 0x1100 0Fh HyperTransport 702 product AMD 0F_ADDR 0x1101 0Fh Address Map 703 product AMD 0F_DRAM 0x1102 0Fh DRAM Cfg 704 product AMD 0F_MISC 0x1103 0Fh Misc Cfg 705 product AMD 10_HT 0x1200 10h HyperTransport 706 product AMD 10_ADDR 0x1201 10h Address Map 707 product AMD 1 [all...] |
| H A D | files.pci | 248 # AMD PCnet-PCI Ethernet controller family 590 # AMD Am53c974 PCscsi-PCI SCSI controllers 660 # AMD-76x PM and SMBus controller 763 # AMD-8111 SMBus controller 777 # AMD NPT Family 0Fh Processors, Function 3 -- Miscellaneous Control 782 # AMD Family 10h Processors, Function 3 -- Miscellaneous Control 787 # AMD Family 15h/17h Temperature sensor over SMN 801 # AMD Geode CS5536 Audio 816 # AMD Geode CS5536 PCI-ISA bridge 841 # AMD Cryptographi [all...] |
| /openbsd-src/gnu/usr.bin/binutils/include/coff/ |
| H A D | a29k.h | 21 #ifndef AMD 22 # define AMD macro
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ScheduleZnver3.td | 12 // * AMD Software Optimization Guide for AMD Family 19h Processors. 14 // * The microarchitecture of Intel, AMD and VIA CPUs, By Agner Fog 16 // * AMD Zen 3 Ryzen Deep Dive Review 21 // AMD SOG 19h, 2.9.6 Dispatch 25 // AMD SOG 19h, 2.10.3 32 // AMD SOG 19h, 2.9.1 Op Cache 43 // AMD SOG 19h, 2.6.2 L1 Data Cache 45 // AMD SOG 19h, 2.12 L1 Data Cache 49 // AMD SOG 19h, 2.12 L1 Data Cache 57 // AMD SOG 19h, 2.8 Optimizing Branching [all …]
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| H A D | X86ScheduleZnver4.td | 12 // * AMD Software Optimization Guide for AMD Family 19h Processors. 17 // AMD SOG 19h, 2.9.6 Dispatch 21 // AMD SOG 19h, 2.10.3 28 // AMD SOG 19h, 2.9.1 Op Cache 41 // AMD SOG 19h, 2.6.2 L1 Data Cache 43 // AMD SOG 19h, 2.12 L1 Data Cache 47 // AMD SOG 19h, 2.12 L1 Data Cache 55 // AMD SOG 19h, 2.8 Optimizing Branching 72 // AMD SOG 19h, 2.10.3 Retire Control Unit 82 // AMD SOG 19h, 2.4 Superscalar Organization [all …]
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| H A D | X86InstrSNP.td | 9 // This file describes the instructions that make up the AMD Secure Nested
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| H A D | X86ScheduleBtVer2.td | 9 // This file defines the machine model for AMD btver2 (Jaguar) to support 10 // instruction scheduling and other instruction cost heuristics. Based off AMD Software 11 // Optimization Guide for AMD Family 16h Processors & Instruction Latency appendix. 48 // Reference: Section 21.10 "AMD Bobcat and Jaguar pipeline: Partial register 61 // Reference: Section 21.8 "AMD Bobcat and Jaguar pipeline: Dependency-breaking 69 // Reference: "Software Optimization Guide for AMD Family 16h Processors" 861 // Reference: Section 10.8 of the "Software Optimization Guide for AMD Family 863 // Reference: Agner's Fog "The microarchitecture of Intel, AMD and VIA CPUs",
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| /openbsd-src/sys/dev/mii/ |
| H A D | miidevs | 37 oui AMD 0x00001a AMD 77 /* in the 79c873, AMD uses another OUI (which matches Davicom!) */ 79 oui xxAMD 0x00606e AMD 115 /* AMD */ 117 model AMD 79C875phy 0x0014 Am79C875 quad 118 model AMD 79C873phy 0x0036 Am79C873 internal
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| /openbsd-src/distrib/notes/amd64/ |
| H A D | whatis | 3 OpenBSD/MACHINE runs on computers equipped with AMD Athlon64 processors.
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| /openbsd-src/sys/arch/amd64/conf/ |
| H A D | GENERIC | 110 aapic* at pci? # AMD 8131 IO apic 115 amdpcib* at pci? # AMD 8111 LPC bridge 117 kate* at pci? # AMD K8 temperature sensor 118 km* at pci? # AMD K10 temperature sensor 119 ksmn* at pci? # AMD K17 temperature sensor 120 amas* at pci? disable # AMD memory configuration 122 ccp* at pci? # AMD Cryptographic Co-processor 123 psp* at ccp? # AMD Platform Security Processor 155 amdiic* at pci? # AMD-8111 SMBus controller 159 amdpm* at pci? # AMD [all...] |
| H A D | RAMDISK_CD | 79 aapic* at pci? # AMD 8131 IO apic 84 ccp* at pci? # AMD Cryptographic Co-processor 184 pcscp* at pci? # AMD 53c974 PCscsi-PCI SCSI 226 pcn* at pci? # AMD PCnet-PCI Ethernet 317 amphy* at mii? # AMD 79C873 PHYs
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| /openbsd-src/regress/sys/arch/amd64/fpu/ |
| H A D | README | 2 the Intel and AMD FPU using the libm function fegetenv(3). Implement
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| /openbsd-src/sys/arch/alpha/conf/ |
| H A D | RAMDISK | 65 #pcn* at pci? # AMD PCnet-PCI Ethernet 71 amphy* at mii? # AMD 79C873 PHYs
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| H A D | RAMDISKBIG | 111 pcscp* at pci? # AMD 53c974 PCscsi-PCI SCSI 118 pcn* at pci? # AMD PCnet-PCI Ethernet 170 amphy* at mii? # AMD 79C873 PHYs
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| /openbsd-src/sys/arch/i386/conf/ |
| H A D | GENERIC | 38 amdmsr0 at mainbus? # MSR access for AMD Geode LX CPUs with GP 87 amdpcib* at pci? # AMD 8111 LPC bridge 92 glxpcib* at pci? # AMD CS5536 PCI-ISA bridge 95 kate* at pci? # AMD K8 temperature sensor 96 km* at pci? # AMD K10 temperature sensor 97 amas* at pci? disable # AMD memory configuration 126 amdiic* at pci? # AMD-8111 SMBus controller 130 amdpm* at pci? # AMD-7xx/8111 and NForce SMBus controller 467 pcscp* at pci? # AMD 53c974 PCscsi-PCI SCSI 537 pcn* at pci? # AMD PCnet-PCI Ethernet [all …]
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| H A D | files.i386 | 114 # AMAS AMD memory address switch 127 # AMD Geode LX series processor security block 137 # AMD Geode LX series MSR access 157 # AMD 8111 LPC bridge
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| /openbsd-src/usr.bin/file/magdir/ |
| H A D | plan9 | 14 0 belong 0x000005AB Plan 9 executable, AMD 29000
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| H A D | varied.out | 11 # AMD 29K
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| /openbsd-src/sys/arch/macppc/conf/ |
| H A D | RAMDISK | 54 pcscp* at pci? # AMD Am53c974 PCscsi-PCI SCSI 87 pcn* at pci? # AMD PCnet-PCI Ethernet 91 amphy* at mii? # AMD 79C873 PHYs
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| /openbsd-src/gnu/gcc/gcc/config/i386/ |
| H A D | k6.md | 1 ;; AMD K6/K6-2 Scheduling 31 ;; "AMD-K6 Processor Data Sheet (Preliminary information)" 34 ;; "AMD-K6 Processor Code Optimization Application Note"
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| /openbsd-src/gnu/llvm/clang/docs/ |
| H A D | ClangOffloadBundler.rst | 159 intermediate steps of the tool chain. Also used for AMD GPU 166 hipv4 Offload code object for the HIP language. Used for AMD GPU 257 *AMD GPU* 258 AMD GPU supports target ID and target features. See `User Guide for AMDGPU Backend
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| /openbsd-src/gnu/llvm/llvm/docs/ |
| H A D | AMDGPUUsage.rst | 35 The AMDGPU backend provides ISA code generation for AMD GPUs, starting with the 56 ``r600`` AMD GPUs HD2XXX-HD6XXX for graphics and compute shaders. 57 ``amdgcn`` AMD GPUs GCN GFX6 onwards for graphics and compute shaders. 66 ``amd`` Can be used for all AMD GPU usage. 80 - AMD's ROCm™ runtime [AMD-ROCm]_ using the *rocm-amdhsa* 81 loader on Linux. See *AMD ROCm Platform Release Notes* 82 [AMD-ROCm-Release-Notes]_ for supported hardware and 84 - AMD's PAL runtime using the *pal-amdhsa* loader on 87 ``amdpal`` Graphic shaders and compute kernels executed on AMD's PAL 90 ``mesa3d`` Graphic shaders and compute kernels executed on AMD's Mesa [all …]
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| /openbsd-src/gnu/usr.bin/binutils-2.17/gas/doc/ |
| H A D | c-i386.texi | 21 architecture in both 16 and 32-bit mode as well as AMD x86-64 architecture 33 * i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations 58 implies Intel i386 architecture, while 64-bit implies AMD x86-64 312 The AMD x86-64 architecture extends the register set by: 595 @section Intel's MMX and AMD's 3DNow! SIMD Operations 606 processors and Pentium II processors, AMD's K6 and K6-2 processors, 607 Cyrix' M2 processor, and probably others. It also supports AMD's 3DNow! 609 available on AMD's K6-2 processor and possibly others in the future. 620 See Intel and AMD documentation, keeping in mind that the operand order in
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