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Searched refs:write_mask (Results 1 – 19 of 19) sorted by relevance

/netbsd-src/sys/arch/arm/rockchip/
H A Drk_gmac.c106 uint32_t write_mask, write_val; in rk3288_gmac_set_mode_rgmii() local
110 write_mask = (RK3288_GRF_SOC_CON1_RMII_MODE | in rk3288_gmac_set_mode_rgmii()
115 write_mask | write_val); in rk3288_gmac_set_mode_rgmii()
118 write_mask = (RK3288_GRF_SOC_CON3_RXCLK_DLY_ENA_GMAC | in rk3288_gmac_set_mode_rgmii()
124 write_mask |= RK3288_GRF_SOC_CON3_TXCLK_DLY_ENA_GMAC | in rk3288_gmac_set_mode_rgmii()
129 write_mask |= RK3288_GRF_SOC_CON3_RXCLK_DLY_ENA_GMAC | in rk3288_gmac_set_mode_rgmii()
134 write_mask | write_val); in rk3288_gmac_set_mode_rgmii()
144 uint32_t write_mask, write_val; in rk3288_gmac_set_speed_rgmii() local
148 write_mask = (RK3288_GRF_SOC_CON1_GMAC_CLK_SEL) << 16; in rk3288_gmac_set_speed_rgmii()
162 write_mask | write_va in rk3288_gmac_set_speed_rgmii()
190 uint32_t write_mask, write_val; rk3328_gmac_set_mode_rgmii() local
275 uint32_t write_mask, write_val; rk3399_gmac_set_mode_rgmii() local
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H A Drk_usb.c121 uint32_t reg, write_mask, write_val; in rk_usb_clk_enable() local
126 write_mask = RK3328_USBPHY_COMMONONN << 16; in rk_usb_clk_enable()
133 write_mask = RK3399_USBPHY_COMMONONN << 16; in rk_usb_clk_enable()
141 syscon_write_4(sc->sc_syscon, reg, write_mask | write_val); in rk_usb_clk_enable()
151 uint32_t reg, write_mask, write_val; in rk_usb_clk_disable() local
156 write_mask = RK3328_USBPHY_COMMONONN << 16; in rk_usb_clk_disable()
163 write_mask = RK3399_USBPHY_COMMONONN << 16; in rk_usb_clk_disable()
171 syscon_write_4(sc->sc_syscon, reg, write_mask | write_val); in rk_usb_clk_disable()
303 uint32_t reg, write_mask, write_val; in rk_usbphy_otg_enable() local
309 write_mask = 0x1ffU << 16; in rk_usbphy_otg_enable()
[all …]
H A Drk_cru_arm.c106 const uint32_t write_mask = arm->divs[i].mask << 16; in rk_cru_arm_set_rate_rates() local
109 CRU_WRITE(sc, arm->divs[i].reg, write_mask | write_val); in rk_cru_arm_set_rate_rates()
124 uint32_t write_mask, write_val; in rk_cru_arm_set_rate_cpurates() local
162 write_mask = cpu_rate->divs[i].mask << 16; in rk_cru_arm_set_rate_cpurates()
164 CRU_WRITE(sc, cpu_rate->divs[i].reg, write_mask | write_val); in rk_cru_arm_set_rate_cpurates()
171 write_mask = arm->divs[i].mask << 16; in rk_cru_arm_set_rate_cpurates()
173 CRU_WRITE(sc, arm->divs[i].reg, write_mask | write_val); in rk_cru_arm_set_rate_cpurates()
222 const uint32_t write_mask = arm->mux_mask << 16; in rk_cru_arm_set_parent() local
225 CRU_WRITE(sc, arm->mux_reg, write_mask | write_val); in rk_cru_arm_set_parent()
H A Drk_cru_composite.c52 const uint32_t write_mask = composite->gate_mask << 16; in rk_cru_composite_enable() local
55 CRU_WRITE(sc, composite->gate_reg, write_mask | write_val); in rk_cru_composite_enable()
204 uint32_t write_mask = composite->div_mask << 16; in rk_cru_composite_set_rate() local
207 write_mask |= composite->mux_mask << 16; in rk_cru_composite_set_rate()
211 CRU_WRITE(sc, composite->muxdiv_reg, write_mask | write_val); in rk_cru_composite_set_rate()
249 const uint32_t write_mask = composite->mux_mask << 16; in rk_cru_composite_set_parent() local
252 CRU_WRITE(sc, composite->muxdiv_reg, write_mask | write_val); in rk_cru_composite_set_parent()
H A Drk_cru_mux.c77 const uint32_t write_mask = mux->mask << 16; in rk_cru_mux_set_parent() local
82 syscon_write_4(sc->sc_grf, mux->reg, write_mask | write_val); in rk_cru_mux_set_parent()
85 CRU_WRITE(sc, mux->reg, write_mask | write_val); in rk_cru_mux_set_parent()
H A Drk3288_usb.c125 uint32_t write_mask, write_val; in rk3288_usbphy_enable() local
127 write_mask = GRF_UOCn_CON0_SIDDQ << 16; in rk3288_usbphy_enable()
131 syscon_write_4(sc->sc_syscon, sc->sc_reg, write_mask | write_val); in rk3288_usbphy_enable()
H A Drk_cru_gate.c47 const uint32_t write_mask = gate->mask << 16; in rk_cru_gate_enable() local
50 CRU_WRITE(sc, gate->reg, write_mask | write_val); in rk_cru_gate_enable()
H A Drk_anxdp.c80 const uint32_t write_mask = EDP_LCDC_SEL << 16; in rk_anxdp_select_input() local
84 syscon_write_4(sc->sc_grf, RK3399_GRF_SOC_CON20, write_mask | write_val); in rk_anxdp_select_input()
H A Drk3399_iomux.c337 const uint32_t write_mask = (drv_mask & 0xffff) << 16; in rk3399_iomux_set_drive_strength() local
338 if (write_mask) { in rk3399_iomux_set_drive_strength()
342 WR4(syscon, reg, write_val | write_mask); in rk3399_iomux_set_drive_strength()
H A Drk_dwhdmi.c101 const uint32_t write_mask = HDMI_LCDC_SEL << 16; in rk_dwhdmi_select_input() local
105 syscon_write_4(sc->sc_grf, RK3399_GRF_SOC_CON20, write_mask | write_val); in rk_dwhdmi_select_input()
H A Drk_cru_pll.c252 const uint32_t write_mask = pll->mode_mask << 16; in rk_cru_pll_set_rate() local
254 CRU_WRITE(sc, pll->mode_reg, write_mask | write_val); in rk_cru_pll_set_rate()
H A Drk3399_pmucru.c247 const uint32_t write_mask = pll->mode_mask << 16; in rk3399_pmucru_pll_set_rate() local
249 CRU_WRITE(sc, pll->mode_reg, write_mask | write_val); in rk3399_pmucru_pll_set_rate()
H A Drk_gpio.c272 const uint32_t write_mask = GPIOV2_WRITE_MASK(pin); in rk_gpio_v2_pin_write() local
276 WR4(sc, GPIOV2_SWPORT_DR_REG(pin), write_mask | data); in rk_gpio_v2_pin_write()
H A Drk3399_cru.c1079 uint32_t write_mask, write_val; in rk3399_cru_init() local
1092 write_mask = __BITS(7,0) << 16; in rk3399_cru_init()
1094 CRU_WRITE(sc, CLKSEL_CON(49), write_mask | write_val); in rk3399_cru_init()
1095 CRU_WRITE(sc, CLKSEL_CON(50), write_mask | write_val); in rk3399_cru_init()
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvfw/
H A Dacr.h109 u32 write_mask; member
138 u32 write_mask; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/nvfw/
H A Dnouveau_nvkm_nvfw_acr.c108 hdr->regions.region_props[i].write_mask); in flcn_acr_desc_dump()
151 hdr->regions.region_props[i].write_mask); in flcn_acr_desc_v1_dump()
/netbsd-src/external/cddl/osnet/dist/common/acl/
H A Dacl_common.c1580 uint32_t write_mask = ACE_WRITE_DATA|ACE_APPEND_DATA; in acl_trivial_access_masks() local
1589 masks->deny1 |= write_mask; in acl_trivial_access_masks()
1597 masks->deny2 |= write_mask; in acl_trivial_access_masks()
1605 masks->allow0 |= write_mask; in acl_trivial_access_masks()
1615 masks->owner |= write_mask; in acl_trivial_access_masks()
1624 masks->group |= write_mask; in acl_trivial_access_masks()
1633 masks->everyone |= write_mask; in acl_trivial_access_masks()
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/acr/
H A Dnouveau_nvkm_subdev_acr_gp102.c210 desc->regions.region_props[0].write_mask = 0xc; in gp102_acr_load_load()
H A Dnouveau_nvkm_subdev_acr_gm200.c402 desc->regions.region_props[0].write_mask = 0xc; in gm200_acr_load_load()