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/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_gpu_error.h64 bool simulated; member
117 bool simulated; member
166 bool simulated; member
H A Di915_gpu_error.c1385 ee->simulated |= record_context(&ee->context, rq); in intel_engine_coredump_add_request()
1386 if (ee->simulated) in intel_engine_coredump_add_request()
1494 gt->simulated |= ee->simulated; in gt_record_engines()
1495 if (ee->simulated) { in gt_record_engines()
1853 error->simulated |= error->gt->simulated; in i915_gpu_coredump()
1873 if (error->simulated || in i915_error_state_store()
/netbsd-src/external/gpl3/gdb/dist/sim/rx/
H A DREADME.txt64 are considered to be options for the simulated program, although
77 memory to individual pages as needed, allowing the simulated program
80 the simulated program actually uses. Note that for each page of
101 SCI4.TDR is written to stdout. If the simulated program writes the
/netbsd-src/external/gpl3/binutils.old/dist/ld/scripttempl/
H A Dvisium.sc175 /* Provide a default address for the simulated file-I/O device. */
178 /* Provide a default address for the simulated command line device. */
181 /* Provide a default address for the simulated 1 MHz clock. */
/netbsd-src/external/gpl3/binutils/dist/ld/scripttempl/
H A Dvisium.sc175 /* Provide a default address for the simulated file-I/O device. */
178 /* Provide a default address for the simulated command line device. */
181 /* Provide a default address for the simulated 1 MHz clock. */
/netbsd-src/external/gpl3/gdb.old/dist/sim/erc32/
H A DNEWS70 * Added -freq switch to set simulated frequency.
101 faults if a.out files are loaded outside the simulated memory. See README.
H A DREADME.gdb19 -freq <f> Set the simulated "system clock" to <f> MHz.
/netbsd-src/external/gpl3/gdb/dist/sim/erc32/
H A DNEWS70 * Added -freq switch to set simulated frequency.
101 faults if a.out files are loaded outside the simulated memory. See README.
H A DREADME.sis22 The '-nfp' will disable the simulated FPU, so each FPU instruction will
32 and will be loaded into the simulated memory. The file formats are
196 memory contants. The function should copy 'length' bytes of the simulated
216 The function should copy 'length' bytes from *data to the simulated
H A DREADME.gdb19 -freq <f> Set the simulated "system clock" to <f> MHz.
/netbsd-src/external/apache2/llvm/dist/llvm/docs/CommandGuide/
H A Dllvm-mca.rst199 view because it doesn't require that the code is simulated. It instead prints
382 for a total of 900 simulated instructions. The total number of simulated micro
392 to the out-of-order backend every simulated cycle. For processors with an
394 to the backend every simulated cycle.
396 IPC is computed dividing the total number of simulated instructions by the total
401 (i.e. iterations) that can be executed per simulated clock cycle in the absence
409 Field 'uOps Per Cycle' is computed dividing the total number of simulated micro
647 48.07% of the simulated run. Almost all those pressure increase events were
745 this case, of the 610 simulated cycles, single opcodes were issued 306 times
771 this case, of the 610 simulated cycles, two instructions were retired during the
[all …]
/netbsd-src/external/gpl3/gdb/dist/sim/testsuite/msp430/
H A Dmpyull_hwmult.s2 # 64-bit result is simulated correctly, when using 32-bit or F5series hardware
/netbsd-src/distrib/evbsh3/instkernel/ramdisk/
H A Ddisktab.preinstall6 # ty type of disk (fixed, removable, simulated)
/netbsd-src/external/gpl3/gcc/dist/gcc/config/rs6000/
H A Dcell.md92 ;; these instr are not simulated
419 ;;Things are not simulated:
420 ;; update instruction, update address gpr are not simulated
421 ;; vrefp, vrsqrtefp have latency(14), currently simulated as 12 cycle float
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/rs6000/
H A Dcell.md92 ;; these instr are not simulated
419 ;;Things are not simulated:
420 ;; update instruction, update address gpr are not simulated
421 ;; vrefp, vrsqrtefp have latency(14), currently simulated as 12 cycle float
/netbsd-src/crypto/external/bsd/openssl/dist/doc/internal/man7/
H A Ddeprecation.pod64 symbol is publicly unavailable through simulated removal. That's done by
80 expected to look like, including the preprocessor wrapping for simulated
/netbsd-src/distrib/emips/ramdisk/
H A Ddisktab.preinstall6 # ty type of disk (fixed, removable, simulated)
/netbsd-src/sys/external/bsd/acpica/dist/generate/unix/
H A Dreadme.txt83 the AML interpreter. Hardware access is simulated.
/netbsd-src/external/gpl3/gdb/dist/sim/m32c/
H A DChangeLog-2021619 * mem.c (mem_put_byte): Hook simulated UART to stdout.
620 (mem_put_hi): Hook in simulated trace port.
621 (mem_get_byte): Hook in simulated uart control port.
/netbsd-src/external/apache2/llvm/dist/llvm/docs/
H A DJITLink.rst262 definitions within the same simulated dylib (e.g. ORC ``JITDylib``) or
658 model requires that all code and data for a simulated dylib is allocated within
675 This method takes a ``JITLinkDylib*`` representing the target simulated
678 argument to manage a per-simulated-dylib memory pool (since code model
1118 treat every object as a separate simulated dylib for the purposes of
1122 range pool for each simulated dylib guarantees that the relaxation
/netbsd-src/external/gpl3/gcc/dist/libphobos/
H A Dconfigure.ac285 # Also, get rid of this simulated-VPATH thing that automake does.
/netbsd-src/external/gpl3/gcc.old/dist/libphobos/
H A Dconfigure.ac279 # Also, get rid of this simulated-VPATH thing that automake does.
/netbsd-src/external/gpl3/gdb/dist/sim/testsuite/cris/
H A DChangeLog-2021137 * asm/movecrt10.ms: Update expected number of simulated
/netbsd-src/sys/arch/m68k/fpsp/
H A Dl_fpsp.h41 * exception of ETEMP, WBTEMP, DTAG and STAG which are simulated
/netbsd-src/share/me/
H A Dsummary.external179 po R simulated page offset

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