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/netbsd-src/external/gpl3/gdb/dist/sim/testsuite/frv/interrupts/
H A Dreset.cgs1 # frv testcase to generate reset interrupts
9 .global reset
10 reset:
12 set_gr_immed 0xfeff0500,gr10 ; address of reset register
18 ; set_mem_immed 0x3,gr10 ; cause hardware reset
22 ;ok1: ; reset should branch to reset address which should then branch here
25 ; set_mem_immed 0x2,gr10 ; cause hardware reset
29 ok2: ; reset should branch to reset address which should then branch here
32 set_mem_immed 0x1,gr10 ; cause software reset
36 ok3: ; reset should branch to reset address which should then branch here
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/
H A Dintel_reset.c616 reset_func reset; in __intel_gt_reset() local
620 reset = intel_get_gpu_reset(gt); in __intel_gt_reset()
621 if (!reset) in __intel_gt_reset()
632 ret = reset(gt, engine_mask, retry); in __intel_gt_reset()
642 if (!i915_modparams.reset) in intel_has_gpu_reset()
650 if (i915_modparams.reset < 2) in intel_has_reset_engine()
685 if (engine->reset.prepare) in reset_prepare_engine()
686 engine->reset.prepare(engine); in reset_prepare_engine()
776 if (engine->reset.finish) in reset_finish_engine()
777 engine->reset.finish(engine); in reset_finish_engine()
[all …]
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
H A Dmeson8m2.dtsi36 resets = <&reset RESET_ETHERNET>;
37 reset-names = "stmmaceth";
66 resets = <&reset RESET_DBLK>,
67 <&reset RESET_PIC_DC>,
68 <&reset RESET_HDMI_APB>,
69 <&reset RESET_HDMI_SYSTEM_RESET>,
70 <&reset RESET_VENCI>,
71 <&reset RESET_VENCP>,
72 <&reset RESET_VDAC_4>,
73 <&reset RESET_VENCL>,
[all …]
H A Dtegra20.dtsi44 reset-names = "host1x";
57 reset-names = "mpe";
66 reset-names = "vi";
75 reset-names = "epp";
84 reset-names = "isp";
93 reset-names = "2d";
101 reset-names = "3d";
112 reset-names = "dc";
140 reset-names = "dc";
168 reset-names = "hdmi";
[all …]
H A Dtegra114.dtsi29 reset-names = "host1x";
43 reset-names = "2d";
53 reset-names = "3d";
66 reset-names = "dc";
85 reset-names = "dc";
104 reset-names = "hdmi";
116 reset-names = "dsi";
132 reset-names = "dsi";
182 #reset-cells = <1>;
227 reset-names = "dma";
[all …]
H A Duniphier-pxs2.dtsi273 reset-names = "aio";
431 sd_rst: reset {
432 compatible = "socionext,uniphier-pxs2-sd-reset";
433 #reset-cells = <1>;
447 peri_rst: reset {
448 compatible = "socionext,uniphier-pxs2-peri-reset";
449 #reset-cells = <1>;
461 reset-names = "host", "hw";
465 cap-mmc-hw-reset;
478 reset-names = "host";
[all …]
H A Drtd1195.dtsi11 #include <dt-bindings/reset/realtek,rtd1195.h>
164 reset1: reset-controller@0 {
165 compatible = "snps,dw-low-reset";
167 #reset-cells = <1>;
170 reset2: reset-controller@4 {
171 compatible = "snps,dw-low-reset";
173 #reset-cells = <1>;
176 reset3: reset-controller@8 {
177 compatible = "snps,dw-low-reset";
179 #reset-cells = <1>;
[all …]
H A Duniphier-pro5.dtsi350 sd_rst: reset {
351 compatible = "socionext,uniphier-pro5-sd-reset";
352 #reset-cells = <1>;
366 peri_rst: reset {
367 compatible = "socionext,uniphier-pro5-peri-reset";
368 #reset-cells = <1>;
462 sys_rst: reset {
463 compatible = "socionext,uniphier-pro5-reset";
464 #reset-cells = <1>;
490 usb0_rst: reset@0 {
[all …]
H A Dtegra30.dtsi57 reset-names = "pex", "afi", "pcie_x";
125 reset-names = "host1x";
139 reset-names = "mpe";
150 reset-names = "vi";
161 reset-names = "epp";
172 reset-names = "isp";
183 reset-names = "2d";
196 reset-names = "3d", "3d2";
210 reset-names = "dc";
240 reset-names = "dc";
[all …]
H A Duniphier-pro4.dtsi252 mio_rst: reset {
253 compatible = "socionext,uniphier-pro4-mio-reset";
254 #reset-cells = <1>;
268 peri_rst: reset {
269 compatible = "socionext,uniphier-pro4-peri-reset";
270 #reset-cells = <1>;
293 reset-names = "host", "bridge";
312 reset-names = "host", "bridge", "hw";
318 cap-mmc-hw-reset;
330 reset-names = "host", "bridge";
[all …]
H A Dtegra124.dtsi7 #include <dt-bindings/reset/tegra124-car.h>
57 reset-names = "pex", "afi", "pcie_x";
98 reset-names = "host1x";
113 reset-names = "dc";
140 reset-names = "dc";
164 reset-names = "hdmi";
175 reset-names = "vic";
191 reset-names = "sor";
203 reset-names = "dpaux";
242 reset-names = "gpu";
[all …]
H A Dmeson8b.dtsi11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
273 resets = <&reset RESET_MALI>;
302 resets = <&reset RESET_AIU>;
390 resets = <&reset RESET_MEDIA_CPU>;
395 reset: reset-controller@4404 { label
396 compatible = "amlogic,meson8b-reset";
398 #reset-cells = <1>;
576 resets = <&reset RESET_ETHERNET>;
577 reset-names = "stmmaceth";
[all …]
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/realtek/
H A Drtd139x.dtsi12 #include <dt-bindings/reset/realtek,rtd1295.h>
124 reset1: reset-controller@0 {
125 compatible = "snps,dw-low-reset";
127 #reset-cells = <1>;
130 reset2: reset-controller@4 {
131 compatible = "snps,dw-low-reset";
133 #reset-cells = <1>;
136 reset3: reset-controller@8 {
137 compatible = "snps,dw-low-reset";
139 #reset-cells = <1>;
[all …]
H A Drtd129x.dtsi13 #include <dt-bindings/reset/realtek,rtd1295.h>
126 reset1: reset-controller@0 {
127 compatible = "snps,dw-low-reset";
129 #reset-cells = <1>;
132 reset2: reset-controller@4 {
133 compatible = "snps,dw-low-reset";
135 #reset-cells = <1>;
138 reset3: reset-controller@8 {
139 compatible = "snps,dw-low-reset";
141 #reset-cells = <1>;
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/selftests/
H A Digt_reset.c24 pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags); in igt_global_reset_lock()
26 while (test_and_set_bit(I915_RESET_BACKOFF, &gt->reset.flags)) in igt_global_reset_lock()
27 wait_event(gt->reset.queue, in igt_global_reset_lock()
28 !test_bit(I915_RESET_BACKOFF, &gt->reset.flags)); in igt_global_reset_lock()
32 &gt->reset.flags)) in igt_global_reset_lock()
33 wait_on_bit(&gt->reset.flags, I915_RESET_ENGINE + id, in igt_global_reset_lock()
44 clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags); in igt_global_reset_unlock()
46 clear_bit(I915_RESET_BACKOFF, &gt->reset.flags); in igt_global_reset_unlock()
47 wake_up_all(&gt->reset.queue); in igt_global_reset_unlock()
/netbsd-src/sys/arch/arm/altera/
H A Dcycv_rstmgr.c97 struct cycv_reset *reset = NULL; in cycv_rst_acquire() local
108 reset = kmem_alloc(sizeof *reset, KM_SLEEP); in cycv_rst_acquire()
109 reset->address = CYCV_RSTMGR_MPUMODRST + value / 32 * 4; in cycv_rst_acquire()
110 reset->mask = 1 << (value % 32); in cycv_rst_acquire()
116 return reset; in cycv_rst_acquire()
125 cycv_rst_reset_set(device_t dev, struct cycv_reset *reset, int set) { in cycv_rst_reset_set() argument
127 uint32_t val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, reset->address); in cycv_rst_reset_set()
130 val |= reset->mask; in cycv_rst_reset_set()
132 val &= ~reset->mask; in cycv_rst_reset_set()
134 bus_space_write_4(sc->sc_bst, sc->sc_bsh, reset->address, val); in cycv_rst_reset_set()
/netbsd-src/sys/dev/usb/
H A Dauvitek_board.c52 uint16_t reset; member
57 .reset = 0x02b0,
62 .reset = 0x02b0,
71 uint16_t reset, enable; in auvitek_board_init() local
76 reset = auvitek_board_config[sc->sc_board].reset; in auvitek_board_init()
83 if (reset) { in auvitek_board_init()
84 auvitek_write_1(sc, AU0828_REG_GPIO2_PINDIR, reset >> 8); in auvitek_board_init()
85 auvitek_write_1(sc, AU0828_REG_GPIO1_PINDIR, reset & 0xff); in auvitek_board_init()
/netbsd-src/crypto/external/cpl/tpm-tools/dist/src/tpm_mgmt/
H A Dtpm_reset.c32 char reset[] = { in main() local
48 err = write( fd, reset, sizeof(reset) ); in main()
50 if ( err != sizeof( reset ) ){ in main()
55 err = read( fd, reset, sizeof(reset) ); in main()
61 err = ntohl( *((uint32_t *)(reset+6)) ); in main()
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl.dtsi11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
27 resets = <&reset RESET_USB_OTG>;
64 resets = <&reset RESET_ACODEC>;
100 resets = <&reset RESET_AIU>;
110 resets = <&reset RESET_USB_OTG>;
111 reset-names = "phy";
121 resets = <&reset RESET_USB_OTG>;
122 reset-names = "phy";
322 resets = <&reset RESET_HDMITX_CAPB3>,
323 <&reset RESET_HDMI_SYSTEM_RESET>,
[all …]
H A Dmeson-gxbb.dtsi9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
22 resets = <&reset RESET_USB_OTG>;
32 resets = <&reset RESET_USB_OTG>;
84 resets = <&reset RESET_AIU>;
310 resets = <&reset RESET_HDMITX_CAPB3>,
311 <&reset RESET_HDMI_SYSTEM_RESET>,
312 <&reset RESET_HDMI_TX>;
313 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
723 resets = <&reset RESET_VIU>,
[all …]
/netbsd-src/external/bsd/unbound/dist/daemon/
H A Dstats.c141 int reset) in set_subnet_stats() argument
148 if(reset && !worker->env.cfg->stat_cumulative) { in set_subnet_stats()
155 if(reset && !worker->env.cfg->stat_cumulative) { in set_subnet_stats()
166 int reset) in set_neg_cache_stats() argument
180 if(reset && !worker->env.cfg->stat_cumulative) { in set_neg_cache_stats()
189 get_rrset_bogus(struct worker* worker, int reset) in get_rrset_bogus() argument
199 if(reset && !worker->env.cfg->stat_cumulative) in get_rrset_bogus()
207 get_queries_ratelimit(struct worker* worker, int reset) in get_queries_ratelimit() argument
217 if(reset && !worker->env.cfg->stat_cumulative) in get_queries_ratelimit()
226 get_dnscrypt_cache_miss(struct worker* worker, int reset) in get_dnscrypt_cache_miss() argument
[all …]
/netbsd-src/tests/bin/cp/
H A Dt_cp.sh39 reset() { function
54 reset
108 reset
118 reset
131 reset
142 reset
154 reset
167 reset
179 reset
195 reset
[all …]
/netbsd-src/sys/arch/arm/amlogic/
H A Dmeson_clk_pll.c144 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 1); in meson_clk_pll_set_rate()
145 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 0); in meson_clk_pll_set_rate()
151 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 1); in meson_clk_pll_set_rate()
162 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 1); in meson_clk_pll_set_rate()
165 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 0); in meson_clk_pll_set_rate()
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/socionext/
H A Duniphier-pxs3.dtsi133 reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>;
374 sd_rst: reset {
375 compatible = "socionext,uniphier-pxs3-sd-reset";
376 #reset-cells = <1>;
390 peri_rst: reset {
391 compatible = "socionext,uniphier-pxs3-peri-reset";
392 #reset-cells = <1>;
424 reset-names = "host";
539 sys_rst: reset {
540 compatible = "socionext,uniphier-pxs3-reset";
[all …]
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi50 reset-names = "pex", "afi", "pcie_x";
92 reset-names = "host1x";
106 reset-names = "dc";
120 reset-names = "dc";
135 reset-names = "hdmi";
150 reset-names = "sor";
162 reset-names = "dpaux";
196 reset-names = "gpu";
229 #reset-cells = <1>;
246 reset-names = "actmon";
[all …]

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