xref: /netbsd-src/sys/arch/arm/amlogic/meson_clk_pll.c (revision 8afae5d5338994bf67aae444ff6e8ca504382a5e)
1*8afae5d5Sryo /* $NetBSD: meson_clk_pll.c,v 1.3 2021/01/01 07:21:58 ryo Exp $ */
2912cfa14Sjmcneill 
3912cfa14Sjmcneill /*-
4912cfa14Sjmcneill  * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
5912cfa14Sjmcneill  * All rights reserved.
6912cfa14Sjmcneill  *
7912cfa14Sjmcneill  * Redistribution and use in source and binary forms, with or without
8912cfa14Sjmcneill  * modification, are permitted provided that the following conditions
9912cfa14Sjmcneill  * are met:
10912cfa14Sjmcneill  * 1. Redistributions of source code must retain the above copyright
11912cfa14Sjmcneill  *    notice, this list of conditions and the following disclaimer.
12912cfa14Sjmcneill  * 2. Redistributions in binary form must reproduce the above copyright
13912cfa14Sjmcneill  *    notice, this list of conditions and the following disclaimer in the
14912cfa14Sjmcneill  *    documentation and/or other materials provided with the distribution.
15912cfa14Sjmcneill  *
16912cfa14Sjmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17912cfa14Sjmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18912cfa14Sjmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19912cfa14Sjmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20912cfa14Sjmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21912cfa14Sjmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22912cfa14Sjmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23912cfa14Sjmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24912cfa14Sjmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25912cfa14Sjmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26912cfa14Sjmcneill  * SUCH DAMAGE.
27912cfa14Sjmcneill  */
28912cfa14Sjmcneill 
29912cfa14Sjmcneill #include <sys/cdefs.h>
30*8afae5d5Sryo __KERNEL_RCSID(0, "$NetBSD: meson_clk_pll.c,v 1.3 2021/01/01 07:21:58 ryo Exp $");
31912cfa14Sjmcneill 
32912cfa14Sjmcneill #include <sys/param.h>
33912cfa14Sjmcneill #include <sys/bus.h>
34912cfa14Sjmcneill 
35912cfa14Sjmcneill #include <dev/clk/clk_backend.h>
36912cfa14Sjmcneill 
37912cfa14Sjmcneill #include <arm/amlogic/meson_clk.h>
38912cfa14Sjmcneill 
39912cfa14Sjmcneill u_int
meson_clk_pll_get_rate(struct meson_clk_softc * sc,struct meson_clk_clk * clk)40912cfa14Sjmcneill meson_clk_pll_get_rate(struct meson_clk_softc *sc,
41912cfa14Sjmcneill     struct meson_clk_clk *clk)
42912cfa14Sjmcneill {
43912cfa14Sjmcneill 	struct meson_clk_pll *pll = &clk->u.pll;
44912cfa14Sjmcneill 	struct clk *clkp, *clkp_parent;
45912cfa14Sjmcneill 	u_int n, m, frac;
46912cfa14Sjmcneill 	uint64_t parent_rate, rate;
47912cfa14Sjmcneill 	uint32_t val;
48912cfa14Sjmcneill 
49912cfa14Sjmcneill 	KASSERT(clk->type == MESON_CLK_PLL);
50912cfa14Sjmcneill 
51912cfa14Sjmcneill 	clkp = &clk->base;
52912cfa14Sjmcneill 	clkp_parent = clk_get_parent(clkp);
53912cfa14Sjmcneill 	if (clkp_parent == NULL)
54912cfa14Sjmcneill 		return 0;
55912cfa14Sjmcneill 
56912cfa14Sjmcneill 	parent_rate = clk_get_rate(clkp_parent);
57912cfa14Sjmcneill 	if (parent_rate == 0)
58912cfa14Sjmcneill 		return 0;
59912cfa14Sjmcneill 
607e38c880Sjmcneill 	CLK_LOCK(sc);
617e38c880Sjmcneill 
62912cfa14Sjmcneill 	val = CLK_READ(sc, pll->n.reg);
63912cfa14Sjmcneill 	n = __SHIFTOUT(val, pll->n.mask);
64912cfa14Sjmcneill 
65912cfa14Sjmcneill 	val = CLK_READ(sc, pll->m.reg);
66912cfa14Sjmcneill 	m = __SHIFTOUT(val, pll->m.mask);
67912cfa14Sjmcneill 
68912cfa14Sjmcneill 	if (pll->frac.mask) {
69912cfa14Sjmcneill 		val = CLK_READ(sc, pll->frac.reg);
70912cfa14Sjmcneill 		frac = __SHIFTOUT(val, pll->frac.mask);
71912cfa14Sjmcneill 	} else {
72912cfa14Sjmcneill 		frac = 0;
73912cfa14Sjmcneill 	}
74912cfa14Sjmcneill 
757e38c880Sjmcneill 	CLK_UNLOCK(sc);
767e38c880Sjmcneill 
77912cfa14Sjmcneill 	rate = parent_rate * m;
78912cfa14Sjmcneill 	if (frac) {
79912cfa14Sjmcneill 		uint64_t frac_rate = parent_rate * frac;
80912cfa14Sjmcneill 		rate += howmany(frac_rate, __SHIFTOUT_MASK(pll->frac.mask) + 1);
81912cfa14Sjmcneill 	}
82912cfa14Sjmcneill 
83912cfa14Sjmcneill 	return (u_int)howmany(rate, n);
84912cfa14Sjmcneill }
85912cfa14Sjmcneill 
86*8afae5d5Sryo /* the lock must have been acquired with CLK_LOCK() */
87*8afae5d5Sryo int
meson_clk_pll_wait_lock(struct meson_clk_softc * sc,struct meson_clk_pll * pll)88*8afae5d5Sryo meson_clk_pll_wait_lock(struct meson_clk_softc *sc, struct meson_clk_pll *pll)
89*8afae5d5Sryo {
90*8afae5d5Sryo 	int i;
91*8afae5d5Sryo 	for (i = 24000000; i > 0; i--) {
92*8afae5d5Sryo 		if ((CLK_READ(sc, pll->l.reg) & pll->l.mask) != 0)
93*8afae5d5Sryo 			return 0;
94*8afae5d5Sryo 	}
95*8afae5d5Sryo 	return ETIMEDOUT;
96*8afae5d5Sryo }
97*8afae5d5Sryo 
98*8afae5d5Sryo int
meson_clk_pll_set_rate(struct meson_clk_softc * sc,struct meson_clk_clk * clk,u_int new_rate)99*8afae5d5Sryo meson_clk_pll_set_rate(struct meson_clk_softc *sc, struct meson_clk_clk *clk,
100*8afae5d5Sryo     u_int new_rate)
101*8afae5d5Sryo {
102*8afae5d5Sryo 	struct meson_clk_pll *pll = &clk->u.pll;
103*8afae5d5Sryo 	struct clk *clkp, *clkp_parent;
104*8afae5d5Sryo 	uint64_t parent_rate, tmp;
105*8afae5d5Sryo 	uint32_t n, m, m_max, frac, frac_max;
106*8afae5d5Sryo 	int error;
107*8afae5d5Sryo 
108*8afae5d5Sryo 	KASSERT(clk->type == MESON_CLK_PLL);
109*8afae5d5Sryo 
110*8afae5d5Sryo 	clkp = &clk->base;
111*8afae5d5Sryo 	clkp_parent = clk_get_parent(clkp);
112*8afae5d5Sryo 	if (clkp_parent == NULL)
113*8afae5d5Sryo 		return ENXIO;
114*8afae5d5Sryo 
115*8afae5d5Sryo 	if ((pll->flags & MESON_CLK_DIV_SET_RATE_PARENT) != 0)
116*8afae5d5Sryo 		return clk_set_rate(clkp_parent, new_rate);
117*8afae5d5Sryo 
118*8afae5d5Sryo 	parent_rate = clk_get_rate(clkp_parent);
119*8afae5d5Sryo 	if (parent_rate == 0) {
120*8afae5d5Sryo 		error = (new_rate == 0) ? 0 : ERANGE;
121*8afae5d5Sryo 		return error;
122*8afae5d5Sryo 	}
123*8afae5d5Sryo 
124*8afae5d5Sryo 	if (parent_rate > new_rate) {
125*8afae5d5Sryo 		n = parent_rate / new_rate;
126*8afae5d5Sryo 		parent_rate /= n;
127*8afae5d5Sryo 	} else {
128*8afae5d5Sryo 		n = 1;
129*8afae5d5Sryo 	}
130*8afae5d5Sryo 
131*8afae5d5Sryo #define DIV_ROUND_OFF(x, y) (((x) + (y) / 2) / (y))
132*8afae5d5Sryo 	m_max = __SHIFTOUT(pll->m.mask, pll->m.mask);
133*8afae5d5Sryo 	frac_max = __SHIFTOUT(pll->frac.mask, pll->frac.mask);
134*8afae5d5Sryo 	tmp = DIV_ROUND_OFF(new_rate * (frac_max + 1), parent_rate);
135*8afae5d5Sryo 	m = tmp / (frac_max + 1);
136*8afae5d5Sryo 	frac = tmp & frac_max;
137*8afae5d5Sryo 
138*8afae5d5Sryo 	if (m > m_max)
139*8afae5d5Sryo 		return ERANGE;
140*8afae5d5Sryo 
141*8afae5d5Sryo 	CLK_LOCK(sc);
142*8afae5d5Sryo 
143*8afae5d5Sryo 	/* reset */
144*8afae5d5Sryo 	CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 1);
145*8afae5d5Sryo 	CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 0);
146*8afae5d5Sryo 	error = meson_clk_pll_wait_lock(sc, pll);
147*8afae5d5Sryo 	if (error != 0)
148*8afae5d5Sryo 		goto failure;
149*8afae5d5Sryo 
150*8afae5d5Sryo 	/* disable */
151*8afae5d5Sryo 	CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 1);
152*8afae5d5Sryo 	CLK_WRITE_BITS(sc, pll->enable.reg, pll->enable.mask, 0);
153*8afae5d5Sryo 
154*8afae5d5Sryo 	/* write new M, N, and FRAC */
155*8afae5d5Sryo 	CLK_WRITE_BITS(sc, pll->m.reg, pll->m.mask, m);
156*8afae5d5Sryo 	CLK_WRITE_BITS(sc, pll->n.reg, pll->n.mask, n);
157*8afae5d5Sryo 	if (pll->frac.mask) {
158*8afae5d5Sryo 		CLK_WRITE_BITS(sc, pll->frac.reg, pll->frac.mask, frac);
159*8afae5d5Sryo 	}
160*8afae5d5Sryo 
161*8afae5d5Sryo 	/* enable */
162*8afae5d5Sryo 	CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 1);
163*8afae5d5Sryo 	CLK_WRITE_BITS(sc, pll->enable.reg, pll->enable.mask, 1);
164*8afae5d5Sryo 	DELAY(1000);
165*8afae5d5Sryo 	CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 0);
166*8afae5d5Sryo 	error = meson_clk_pll_wait_lock(sc, pll);
167*8afae5d5Sryo  failure:
168*8afae5d5Sryo 	CLK_UNLOCK(sc);
169*8afae5d5Sryo 
170*8afae5d5Sryo 	return error;
171*8afae5d5Sryo }
172*8afae5d5Sryo 
173912cfa14Sjmcneill const char *
meson_clk_pll_get_parent(struct meson_clk_softc * sc,struct meson_clk_clk * clk)174912cfa14Sjmcneill meson_clk_pll_get_parent(struct meson_clk_softc *sc,
175912cfa14Sjmcneill     struct meson_clk_clk *clk)
176912cfa14Sjmcneill {
177912cfa14Sjmcneill 	struct meson_clk_pll *pll = &clk->u.pll;
178912cfa14Sjmcneill 
179912cfa14Sjmcneill 	KASSERT(clk->type == MESON_CLK_PLL);
180912cfa14Sjmcneill 
181912cfa14Sjmcneill 	return pll->parent;
182912cfa14Sjmcneill }
183