| /netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | radeon_asic.h | 36 uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
37 void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
38 uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev);
39 void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
41 uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
42 void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
43 uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev);
44 void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock);
45 void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
63 int r100_init(struct radeon_device *rdev);
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| H A D | radeon_pm.c | 55 static int radeon_debugfs_pm_init(struct radeon_device *rdev);
56 static bool radeon_pm_in_vbl(struct radeon_device *rdev);
57 static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish);
58 static void radeon_pm_update_profile(struct radeon_device *rdev);
59 static void radeon_pm_set_clocks(struct radeon_device *rdev);
61 int radeon_pm_get_type_index(struct radeon_device *rdev, in radeon_pm_get_type_index() argument
68 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
69 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
76 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
79 void radeon_pm_acpi_event_handler(struct radeon_device *rdev) in radeon_pm_acpi_event_handler() argument
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| H A D | radeon_device.c | 166 struct radeon_device *rdev = dev->dev_private; in radeon_is_px() local
168 if (rdev->flags & RADEON_IS_PX) in radeon_is_px()
173 static void radeon_device_handle_px_quirks(struct radeon_device *rdev) in radeon_device_handle_px_quirks() argument
179 if (rdev->pdev->vendor == p->chip_vendor && in radeon_device_handle_px_quirks()
180 rdev->pdev->device == p->chip_device && in radeon_device_handle_px_quirks()
181 rdev->pdev->subsystem_vendor == p->subsys_vendor && in radeon_device_handle_px_quirks()
182 rdev->pdev->subsystem_device == p->subsys_device) { in radeon_device_handle_px_quirks()
183 rdev->px_quirk_flags = p->px_quirk_flags; in radeon_device_handle_px_quirks()
189 if (rdev->px_quirk_flags & RADEON_PX_QUIRK_DISABLE_PX) in radeon_device_handle_px_quirks()
190 rdev->flags &= ~RADEON_IS_PX; in radeon_device_handle_px_quirks()
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| H A D | radeon_r420.c | 50 void r420_pm_init_profile(struct radeon_device *rdev) in r420_pm_init_profile() argument
53 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; in r420_pm_init_profile()
54 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; in r420_pm_init_profile()
55 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; in r420_pm_init_profile()
56 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; in r420_pm_init_profile()
58 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 0; in r420_pm_init_profile()
59 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; in r420_pm_init_profile()
60 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; in r420_pm_init_profile()
61 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; in r420_pm_init_profile()
63 rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0; in r420_pm_init_profile()
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| H A D | radeon_gart.c | 76 int radeon_gart_table_ram_alloc(struct radeon_device *rdev) in radeon_gart_table_ram_alloc() argument
82 error = bus_dmamem_alloc(rdev->ddev->dmat, rdev->gart.table_size, in radeon_gart_table_ram_alloc()
83 PAGE_SIZE, 0, &rdev->gart.rg_table_seg, 1, &rsegs, BUS_DMA_WAITOK); in radeon_gart_table_ram_alloc()
87 error = bus_dmamap_create(rdev->ddev->dmat, rdev->gart.table_size, 1, in radeon_gart_table_ram_alloc()
88 rdev->gart.table_size, 0, BUS_DMA_WAITOK, in radeon_gart_table_ram_alloc()
89 &rdev->gart.rg_table_map); in radeon_gart_table_ram_alloc()
92 error = bus_dmamem_map(rdev->ddev->dmat, &rdev->gart.rg_table_seg, 1, in radeon_gart_table_ram_alloc()
93 rdev->gart.table_size, &rdev->gart.ptr, in radeon_gart_table_ram_alloc()
97 error = bus_dmamap_load(rdev->ddev->dmat, rdev->gart.rg_table_map, in radeon_gart_table_ram_alloc()
98 rdev->gart.ptr, rdev->gart.table_size, NULL, BUS_DMA_WAITOK); in radeon_gart_table_ram_alloc()
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| H A D | radeon_r520.c | 41 int r520_mc_wait_for_idle(struct radeon_device *rdev) in r520_mc_wait_for_idle() argument
46 for (i = 0; i < rdev->usec_timeout; i++) { in r520_mc_wait_for_idle()
57 static void r520_gpu_init(struct radeon_device *rdev) in r520_gpu_init() argument
61 rv515_vga_render_disable(rdev); in r520_gpu_init()
83 if (rdev->family == CHIP_RV530) { in r520_gpu_init()
86 r420_pipes_init(rdev); in r520_gpu_init()
93 if (r520_mc_wait_for_idle(rdev)) { in r520_gpu_init()
98 static void r520_vram_get_type(struct radeon_device *rdev) in r520_vram_get_type() argument
102 rdev->mc.vram_width = 128; in r520_vram_get_type()
103 rdev->mc.vram_is_ddr = true; in r520_vram_get_type()
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| H A D | radeon_irq_kms.c | 63 struct radeon_device *rdev = dev->dev_private; in radeon_driver_irq_handler_kms() local
66 ret = radeon_irq_process(rdev); in radeon_driver_irq_handler_kms()
88 struct radeon_device *rdev = container_of(work, struct radeon_device, in radeon_hotplug_work_func() local
90 struct drm_device *dev = rdev->ddev; in radeon_hotplug_work_func()
96 if (!rdev->mode_info.mode_config_initialized) in radeon_hotplug_work_func()
109 struct radeon_device *rdev = container_of(work, struct radeon_device, in radeon_dp_work_func() local
111 struct drm_device *dev = rdev->ddev; in radeon_dp_work_func()
129 struct radeon_device *rdev = dev->dev_private; in radeon_driver_irq_preinstall_kms() local
133 spin_lock_irqsave(&rdev->irq.lock, irqflags); in radeon_driver_irq_preinstall_kms()
136 atomic_set(&rdev->irq.ring_int[i], 0); in radeon_driver_irq_preinstall_kms()
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| H A D | radeon_fence.c | 75 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) in radeon_fence_write() argument
77 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_write()
78 if (likely(rdev->wb.enabled || !drv->scratch_reg)) { in radeon_fence_write()
96 static u32 radeon_fence_read(struct radeon_device *rdev, int ring) in radeon_fence_read() argument
98 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_read()
101 if (likely(rdev->wb.enabled || !drv->scratch_reg)) { in radeon_fence_read()
121 static void radeon_fence_schedule_check(struct radeon_device *rdev, int ring) in radeon_fence_schedule_check() argument
128 &rdev->fence_drv[ring].lockup_work, in radeon_fence_schedule_check()
142 int radeon_fence_emit(struct radeon_device *rdev, in radeon_fence_emit() argument
153 (*fence)->rdev = rdev; in radeon_fence_emit()
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| H A D | radeon_ni.c | 52 u32 tn_smc_rreg(struct radeon_device *rdev, u32 reg) in tn_smc_rreg() argument
57 spin_lock_irqsave(&rdev->smc_idx_lock, flags); in tn_smc_rreg()
60 spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); in tn_smc_rreg()
64 void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v) in tn_smc_wreg() argument
68 spin_lock_irqsave(&rdev->smc_idx_lock, flags); in tn_smc_wreg()
71 spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); in tn_smc_wreg()
200 extern bool evergreen_is_display_hung(struct radeon_device *rdev);
201 extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev);
202 extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save);
203 extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save);
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| H A D | radeon_rv770.c | 51 static void rv770_gpu_init(struct radeon_device *rdev);
52 void rv770_fini(struct radeon_device *rdev);
53 static void rv770_pcie_gen2_enable(struct radeon_device *rdev);
54 int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
56 int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) in rv770_set_uvd_clocks() argument
62 if (rdev->family == CHIP_RV740) in rv770_set_uvd_clocks()
63 return evergreen_set_uvd_clocks(rdev, vclk, dclk); in rv770_set_uvd_clocks()
76 r = radeon_uvd_calc_upll_dividers(rdev, vclk, dclk, 50000, 160000, in rv770_set_uvd_clocks()
96 r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); in rv770_set_uvd_clocks()
127 r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); in rv770_set_uvd_clocks()
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| H A D | radeon_rs400.c | 46 static int rs400_debugfs_pcie_gart_info_init(struct radeon_device *rdev);
48 void rs400_gart_adjust_size(struct radeon_device *rdev) in rs400_gart_adjust_size() argument
51 switch (rdev->mc.gtt_size/(1024*1024)) { in rs400_gart_adjust_size()
62 (unsigned)(rdev->mc.gtt_size >> 20)); in rs400_gart_adjust_size()
65 rdev->mc.gtt_size = 32 * 1024 * 1024; in rs400_gart_adjust_size()
70 void rs400_gart_tlb_flush(struct radeon_device *rdev) in rs400_gart_tlb_flush() argument
73 unsigned int timeout = rdev->usec_timeout; in rs400_gart_tlb_flush()
86 int rs400_gart_init(struct radeon_device *rdev) in rs400_gart_init() argument
90 if (rdev->gart.ptr) { in rs400_gart_init()
95 switch(rdev->mc.gtt_size / (1024 * 1024)) { in rs400_gart_init()
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| H A D | radeon_r600.c | 113 int r600_debugfs_mc_info_init(struct radeon_device *rdev);
116 int r600_mc_wait_for_idle(struct radeon_device *rdev);
117 static void r600_gpu_init(struct radeon_device *rdev);
118 void r600_fini(struct radeon_device *rdev);
119 void r600_irq_disable(struct radeon_device *rdev);
120 static void r600_pcie_gen2_enable(struct radeon_device *rdev);
121 extern int evergreen_rlc_resume(struct radeon_device *rdev);
122 extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev);
127 u32 r600_rcu_rreg(struct radeon_device *rdev, u32 reg) in r600_rcu_rreg() argument
132 spin_lock_irqsave(&rdev->rcu_idx_lock, flags); in r600_rcu_rreg()
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| H A D | radeon.h | 256 bool radeon_get_bios(struct radeon_device *rdev);
272 int radeon_dummy_page_init(struct radeon_device *rdev);
273 void radeon_dummy_page_fini(struct radeon_device *rdev);
298 int radeon_pm_init(struct radeon_device *rdev);
299 int radeon_pm_late_init(struct radeon_device *rdev);
300 void radeon_pm_fini(struct radeon_device *rdev);
301 void radeon_pm_compute_clocks(struct radeon_device *rdev);
302 void radeon_pm_suspend(struct radeon_device *rdev);
303 void radeon_pm_resume(struct radeon_device *rdev);
304 void radeon_combios_get_power_modes(struct radeon_device *rdev);
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| H A D | radeon_rs600.c | 57 static void rs600_gpu_init(struct radeon_device *rdev);
58 int rs600_mc_wait_for_idle(struct radeon_device *rdev);
66 static bool avivo_is_in_vblank(struct radeon_device *rdev, int crtc) in avivo_is_in_vblank() argument
74 static bool avivo_is_counter_moving(struct radeon_device *rdev, int crtc) in avivo_is_counter_moving() argument
95 void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc) in avivo_wait_for_vblank() argument
99 if (crtc >= rdev->num_crtc) in avivo_wait_for_vblank()
108 while (avivo_is_in_vblank(rdev, crtc)) { in avivo_wait_for_vblank()
110 if (!avivo_is_counter_moving(rdev, crtc)) in avivo_wait_for_vblank()
115 while (!avivo_is_in_vblank(rdev, crtc)) { in avivo_wait_for_vblank()
117 if (!avivo_is_counter_moving(rdev, crtc)) in avivo_wait_for_vblank()
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| H A D | radeon_evergreen.c | 54 u32 eg_cg_rreg(struct radeon_device *rdev, u32 reg) in eg_cg_rreg() argument
59 spin_lock_irqsave(&rdev->cg_idx_lock, flags); in eg_cg_rreg()
62 spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); in eg_cg_rreg()
66 void eg_cg_wreg(struct radeon_device *rdev, u32 reg, u32 v) in eg_cg_wreg() argument
70 spin_lock_irqsave(&rdev->cg_idx_lock, flags); in eg_cg_wreg()
73 spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); in eg_cg_wreg()
76 u32 eg_pif_phy0_rreg(struct radeon_device *rdev, u32 reg) in eg_pif_phy0_rreg() argument
81 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy0_rreg()
84 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy0_rreg()
88 void eg_pif_phy0_wreg(struct radeon_device *rdev, u32 reg, u32 v) in eg_pif_phy0_wreg() argument
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| H A D | radeon_rv6xx_dpm.c | 38 static u32 rv6xx_scale_count_given_unit(struct radeon_device *rdev,
48 static struct rv6xx_power_info *rv6xx_get_pi(struct radeon_device *rdev) in rv6xx_get_pi() argument
50 struct rv6xx_power_info *pi = rdev->pm.dpm.priv; in rv6xx_get_pi()
55 static void rv6xx_force_pcie_gen1(struct radeon_device *rdev) in rv6xx_force_pcie_gen1() argument
68 for (i = 0; i < rdev->usec_timeout; i++) { in rv6xx_force_pcie_gen1()
79 static void rv6xx_enable_pcie_gen2_support(struct radeon_device *rdev) in rv6xx_enable_pcie_gen2_support() argument
92 static void rv6xx_enable_bif_dynamic_pcie_gen2(struct radeon_device *rdev, in rv6xx_enable_bif_dynamic_pcie_gen2() argument
105 static void rv6xx_enable_l0s(struct radeon_device *rdev) in rv6xx_enable_l0s() argument
114 static void rv6xx_enable_l1(struct radeon_device *rdev) in rv6xx_enable_l1() argument
126 static void rv6xx_enable_pll_sleep_in_l1(struct radeon_device *rdev) in rv6xx_enable_pll_sleep_in_l1() argument
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| H A D | radeon_kms.c | 67 struct radeon_device *rdev = dev->dev_private; in radeon_driver_unload_kms() local
69 if (rdev == NULL) in radeon_driver_unload_kms()
74 if (rdev->rmmio_size) in radeon_driver_unload_kms()
77 if (rdev->rmmio == NULL) in radeon_driver_unload_kms()
86 radeon_acpi_fini(rdev); in radeon_driver_unload_kms()
88 radeon_modeset_fini(rdev); in radeon_driver_unload_kms()
89 radeon_device_fini(rdev); in radeon_driver_unload_kms()
92 kfree(rdev); in radeon_driver_unload_kms()
111 struct radeon_device *rdev; in radeon_driver_load_kms() local
114 rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL); in radeon_driver_load_kms()
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| H A D | radeon_rs690.c | 42 int rs690_mc_wait_for_idle(struct radeon_device *rdev) in rs690_mc_wait_for_idle() argument
47 for (i = 0; i < rdev->usec_timeout; i++) { in rs690_mc_wait_for_idle()
57 static void rs690_gpu_init(struct radeon_device *rdev) in rs690_gpu_init() argument
60 r420_pipes_init(rdev); in rs690_gpu_init()
61 if (rs690_mc_wait_for_idle(rdev)) { in rs690_gpu_init()
71 void rs690_pm_info(struct radeon_device *rdev) in rs690_pm_info() argument
79 if (atom_parse_data_header(rdev->mode_info.atom_context, index, NULL, in rs690_pm_info()
81 info = (union igp_info *)(rdev->mode_info.atom_context->bios + data_offset); in rs690_pm_info()
87 rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info.ulBootUpMemoryClock)); in rs690_pm_info()
88 rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp); in rs690_pm_info()
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| H A D | radeon_cik.c | 134 extern int r600_ih_ring_alloc(struct radeon_device *rdev);
135 extern void r600_ih_ring_fini(struct radeon_device *rdev);
136 extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save);
137 extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save);
138 extern bool evergreen_is_display_hung(struct radeon_device *rdev);
139 extern void sumo_rlc_fini(struct radeon_device *rdev);
140 extern int sumo_rlc_init(struct radeon_device *rdev);
141 extern void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
142 extern void si_rlc_reset(struct radeon_device *rdev);
143 extern void si_init_uvd_internal_cg(struct radeon_device *rdev);
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| H A D | radeon_kv_dpm.c | 42 static int kv_enable_nb_dpm(struct radeon_device *rdev,
44 static void kv_init_graphics_levels(struct radeon_device *rdev);
45 static int kv_calculate_ds_divider(struct radeon_device *rdev);
46 static int kv_calculate_nbps_level_settings(struct radeon_device *rdev);
47 static int kv_calculate_dpm_settings(struct radeon_device *rdev);
48 static void kv_enable_new_levels(struct radeon_device *rdev);
49 static void kv_program_nbps_index_settings(struct radeon_device *rdev,
51 static int kv_set_enabled_level(struct radeon_device *rdev, u32 level);
52 static int kv_set_enabled_levels(struct radeon_device *rdev);
53 static int kv_force_dpm_highest(struct radeon_device *rdev);
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| H A D | radeon_si.c | 132 static u32 si_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh);
133 static void si_pcie_gen3_enable(struct radeon_device *rdev);
134 static void si_program_aspm(struct radeon_device *rdev);
135 extern void sumo_rlc_fini(struct radeon_device *rdev);
136 extern int sumo_rlc_init(struct radeon_device *rdev);
137 extern int r600_ih_ring_alloc(struct radeon_device *rdev);
138 extern void r600_ih_ring_fini(struct radeon_device *rdev);
139 extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev);
140 extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save);
141 extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save);
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| H A D | radeon_r300.c | 66 uint32_t rv370_pcie_rreg(struct radeon_device *rdev, uint32_t reg) in rv370_pcie_rreg() argument
71 spin_lock_irqsave(&rdev->pcie_idx_lock, flags); in rv370_pcie_rreg()
72 WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask)); in rv370_pcie_rreg()
74 spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags); in rv370_pcie_rreg()
78 void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) in rv370_pcie_wreg() argument
82 spin_lock_irqsave(&rdev->pcie_idx_lock, flags); in rv370_pcie_wreg()
83 WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask)); in rv370_pcie_wreg()
85 spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags); in rv370_pcie_wreg()
91 static int rv370_debugfs_pcie_gart_info_init(struct radeon_device *rdev);
93 void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev) in rv370_pcie_gart_tlb_flush() argument
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| H A D | radeon_rs780_dpm.c | 47 static struct igp_power_info *rs780_get_pi(struct radeon_device *rdev) in rs780_get_pi() argument
49 struct igp_power_info *pi = rdev->pm.dpm.priv; in rs780_get_pi()
54 static void rs780_get_pm_mode_parameters(struct radeon_device *rdev) in rs780_get_pm_mode_parameters() argument
56 struct igp_power_info *pi = rs780_get_pi(rdev); in rs780_get_pm_mode_parameters()
57 struct radeon_mode_info *minfo = &rdev->mode_info; in rs780_get_pm_mode_parameters()
66 for (i = 0; i < rdev->num_crtc; i++) { in rs780_get_pm_mode_parameters()
78 static void rs780_voltage_scaling_enable(struct radeon_device *rdev, bool enable);
80 static int rs780_initialize_dpm_power_state(struct radeon_device *rdev, in rs780_initialize_dpm_power_state() argument
87 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in rs780_initialize_dpm_power_state()
92 r600_engine_clock_entry_set_reference_divider(rdev, 0, dividers.ref_div); in rs780_initialize_dpm_power_state()
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| H A D | radeon_btc_dpm.c | 57 struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev);
58 struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev);
60 extern int ni_mc_load_microcode(struct radeon_device *rdev);
1233 static u32 btc_get_valid_mclk(struct radeon_device *rdev, in btc_get_valid_mclk() argument
1236 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values, in btc_get_valid_mclk()
1240 static u32 btc_get_valid_sclk(struct radeon_device *rdev, in btc_get_valid_sclk() argument
1243 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values, in btc_get_valid_sclk()
1247 void btc_skip_blacklist_clocks(struct radeon_device *rdev, in btc_skip_blacklist_clocks() argument
1266 *sclk = btc_get_valid_sclk(rdev, max_sclk, *sclk + 1); in btc_skip_blacklist_clocks()
1269 btc_skip_blacklist_clocks(rdev, max_sclk, max_mclk, sclk, mclk); in btc_skip_blacklist_clocks()
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| H A D | radeon_trinity_dpm.c | 345 extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable);
346 static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
348 static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev);
349 static void trinity_apply_state_adjust_rules(struct radeon_device *rdev,
360 static struct trinity_power_info *trinity_get_pi(struct radeon_device *rdev) in trinity_get_pi() argument
362 struct trinity_power_info *pi = rdev->pm.dpm.priv; in trinity_get_pi()
367 static void trinity_gfx_powergating_initialize(struct radeon_device *rdev) in trinity_gfx_powergating_initialize() argument
369 struct trinity_power_info *pi = trinity_get_pi(rdev); in trinity_gfx_powergating_initialize()
373 u32 xclk = radeon_get_xclk(rdev); in trinity_gfx_powergating_initialize()
378 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in trinity_gfx_powergating_initialize()
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