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Searched refs:pixel_clock (Results 1 – 25 of 60) sorted by relevance

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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
H A Damdgpu_dcn_calc_auto.c181 …v->byte_per_pixel_in_detc[k], 2.0) / 2.0 * v->v_ratio[k] / 2) / (v->htotal[k] / v->pixel_clock[k]); in mode_support_and_system_configuration()
199 v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0; in mode_support_and_system_configuration()
202 v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 1.5; in mode_support_and_system_configuration()
247 …at[k] == dcn_bw_444 && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0 > (v-… in mode_support_and_system_configuration()
250 …== dcn_bw_writeback && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) >dcn_bw_min… in mode_support_and_system_configuration()
270 v->required_output_bw = v->pixel_clock[k] / 2.0; in mode_support_and_system_configuration()
273 v->required_output_bw = v->pixel_clock[k]; in mode_support_and_system_configuration()
277 v->required_output_bw = v->pixel_clock[k] * 3.0 / 2.0; in mode_support_and_system_configuration()
280 v->required_output_bw = v->pixel_clock[k] * 3.0; in mode_support_and_system_configuration()
336 …v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max3(v->vtaps[k] / 6.0 *dcn_bw_min2(… in mode_support_and_system_configuration()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_atombios_encoders.c348 args.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dac()
409 if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock)) in amdgpu_atombios_encoder_setup_dvo()
417 args.dvo.sDVOEncoder.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dvo()
421 if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock)) in amdgpu_atombios_encoder_setup_dvo()
427 args.dvo_v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dvo()
433 args.dvo_v4.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dvo()
617 args.v1.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
625 else if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock)) in amdgpu_atombios_encoder_setup_dig_encoder()
652 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
660 else if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock)) in amdgpu_atombios_encoder_setup_dig_encoder()
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H A Damdgpu_encoders.c211 u32 pixel_clock) in amdgpu_dig_monitor_is_duallink() argument
231 if (pixel_clock > 340000) in amdgpu_dig_monitor_is_duallink()
236 if (pixel_clock > 165000) in amdgpu_dig_monitor_is_duallink()
253 if (pixel_clock > 340000) in amdgpu_dig_monitor_is_duallink()
258 if (pixel_clock > 165000) in amdgpu_dig_monitor_is_duallink()
/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_atombios_encoders.c402 args.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dac_setup()
458 args.sTVEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_tv_setup()
523 if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) in atombios_dvo_setup()
531 args.dvo.sDVOEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dvo_setup()
535 if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) in atombios_dvo_setup()
541 args.dvo_v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dvo_setup()
547 args.dvo_v4.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dvo_setup()
617 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_digital_setup()
626 if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) in atombios_digital_setup()
642 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_digital_setup()
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H A Dradeon_encoders.c376 u32 pixel_clock) in radeon_dig_monitor_is_duallink() argument
398 if (pixel_clock > 340000) in radeon_dig_monitor_is_duallink()
403 if (pixel_clock > 165000) in radeon_dig_monitor_is_duallink()
423 if (pixel_clock > 340000) in radeon_dig_monitor_is_duallink()
428 if (pixel_clock > 165000) in radeon_dig_monitor_is_duallink()
/netbsd-src/usr.sbin/grfconfig/
H A Dgrfconfig.c170 gv->pixel_clock = atoi(cps[1]); in main()
194 if ((gv->pixel_clock == 0) || in main()
329 gv->pixel_clock / (gv->htotal * 1000), in main()
330 (gv->pixel_clock / (gv->htotal * 100)) in main()
332 gv->pixel_clock / (gv->htotal * gv->vtotal)); in main()
372 gv->pixel_clock, in print_modeline()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/
H A Damdgpu_command_table.c246 params.usPixelClock = cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in encoder_control_digx_v3()
275 params.usPixelClock = cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in encoder_control_digx_v4()
298 params.ulPixelClock = cntl->pixel_clock / 10; in encoder_control_digx_v5()
461 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20)); in transmitter_control_v2()
467 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in transmitter_control_v2()
598 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20)); in transmitter_control_v3()
604 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in transmitter_control_v3()
724 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20)); in transmitter_control_v4()
730 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in transmitter_control_v4()
803 params.usSymClock = cpu_to_le16((uint16_t) (cntl->pixel_clock / 10)); in transmitter_control_v1_5()
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H A Damdgpu_command_table2.c142 params.pclk_10khz = cntl->pixel_clock / 10; in encoder_control_digx_v1_5()
279 ps.param.symclk_10khz = cntl->pixel_clock/10; in transmitter_control_v1_6()
347 struct dmub_rb_cmd_set_pixel_clock pixel_clock = { 0 }; in set_pixel_clock_dmcub() local
349 pixel_clock.header.type = DMUB_CMD__VBIOS; in set_pixel_clock_dmcub()
350 pixel_clock.header.sub_type = DMUB_CMD__VBIOS_SET_PIXEL_CLOCK; in set_pixel_clock_dmcub()
351 pixel_clock.pixel_clock.clk = *clk; in set_pixel_clock_dmcub()
353 dc_dmub_srv_cmd_queue(dmcub, &pixel_clock.header); in set_pixel_clock_dmcub()
H A Dcommand_table.h60 uint32_t pixel_clock,
65 uint32_t pixel_clock,
H A Dcommand_table2.h60 uint32_t pixel_clock,
65 uint32_t pixel_clock,
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/include/
H A Dbios_parser_types.h114 uint32_t pixel_clock; /* khz */ member
127 uint32_t pixel_clock; /* in KHz */ member
154 uint32_t pixel_clock; member
197 uint32_t pixel_clock; member
/netbsd-src/sys/dev/ic/
H A Ddw_hdmi_phy.c302 for (mpll_conf = &sc->sc_mpll_config[0]; mpll_conf->pixel_clock != 0; mpll_conf++) in dwhdmi_phy_configure()
303 if (mode->clock <= mpll_conf->pixel_clock) in dwhdmi_phy_configure()
310 for (phy_conf = &sc->sc_phy_config[0]; phy_conf->pixel_clock != 0; phy_conf++) in dwhdmi_phy_configure()
311 if (mode->clock <= phy_conf->pixel_clock) in dwhdmi_phy_configure()
H A Ddw_hdmi.h53 u_int pixel_clock; member
60 u_int pixel_clock; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Damdgpu_dce_link_encoder.c925 uint32_t pixel_clock) in dce110_link_encoder_enable_tmds_output() argument
945 cntl.pixel_clock = pixel_clock; in dce110_link_encoder_enable_tmds_output()
961 uint32_t pixel_clock) in dce110_link_encoder_enable_lvds_output() argument
978 cntl.pixel_clock = pixel_clock; in dce110_link_encoder_enable_lvds_output()
1014 cntl.pixel_clock = link_settings->link_rate in dce110_link_encoder_enable_dp_output()
1053 cntl.pixel_clock = link_settings->link_rate in dce110_link_encoder_enable_dp_mst_output()
1132 cntl.pixel_clock = link_settings->link_settings.link_rate * in dce110_link_encoder_dp_set_lane_settings()
H A Ddce_link_encoder.h216 uint32_t pixel_clock);
234 uint32_t pixel_clock);
/netbsd-src/sys/arch/amiga/dev/
H A Dgrf_ul.c395 if (abs(md->pixel_clock - ulowell_clock[0]) > in ul_load_mon()
396 abs(md->pixel_clock - ulowell_clock[1])) { in ul_load_mon()
399 md->pixel_clock = ulowell_clock[1]; in ul_load_mon()
403 md->pixel_clock = ulowell_clock[0]; in ul_load_mon()
584 vm->pixel_clock = md->pixel_clock; in ul_getvmode()
H A Dgrfioctl.h85 u_long pixel_clock; /* in Hz. */ member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
H A Dlink_encoder.h142 uint32_t pixel_clock);
151 uint32_t pixel_clock);
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Damdgpu_dcn10_link_encoder.c919 uint32_t pixel_clock) in dcn10_link_encoder_enable_tmds_output() argument
939 cntl.pixel_clock = pixel_clock; in dcn10_link_encoder_enable_tmds_output()
976 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_output()
1015 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_mst_output()
1098 cntl.pixel_clock = link_settings->link_settings.link_rate * in dcn10_link_encoder_dp_set_lane_settings()
/netbsd-src/sys/arch/arm/s3c2xx0/
H A Ds3c24x0_lcd.h84 int pixel_clock; /* in Hz */ member
H A Ds3c24x0_lcd.c107 clkval = (hclk / info->pixel_clock / 2) - 1; in s3c24x0_set_lcd_panel_info()
110 clkval = uimax(2, hclk / info->pixel_clock / 2); in s3c24x0_set_lcd_panel_info()
120 hclk, info->pixel_clock, clkval, reg); in s3c24x0_set_lcd_panel_info()
/netbsd-src/sys/external/bsd/drm2/dist/include/drm/
H A Ddrm_displayid.h80 u8 pixel_clock[3]; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/virtual/
H A Damdgpu_virtual_link_encoder.c53 uint32_t pixel_clock) {} in virtual_link_encoder_enable_tmds_output() argument
/netbsd-src/usr.sbin/videomode/
H A Dvideomode.c160 vm->pixel_clock, vm->disp_width, vm->disp_height, vm->depth); in dump_vm()
/netbsd-src/sys/arch/atari/dev/
H A Dgrfioctl.h92 u_long pixel_clock; /* in Hz. */ member

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