| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 106 FLAG(isMoveImm) in EmitInstrDocs()
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| H A D | CodeGenInstruction.h | 242 bool isMoveImm : 1; variable
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| H A D | CodeGenInstruction.cpp | 376 isMoveImm = R->getValueAsBit("isMoveImm"); in CodeGenInstruction()
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| H A D | InstrInfoEmitter.cpp | 951 if (Inst.isMoveImm) OS << "|(1ULL<<MCID::MoveImm)"; in emitRecord()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPseudo.td | 40 let isReMaterializable = 1, isMoveImm = 1, hasSideEffects = 0,
64 let isReMaterializable = 1, isMoveImm = 1, isAsmParserOnly = 1 in {
256 let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.td | 345 let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in {
362 } // isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1
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| H A D | WebAssemblyInstrSIMD.td | 407 let isMoveImm = 1, isReMaterializable = 1 in
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | VOP3PInstructions.td | 435 let isMoveImm = 1 in {
437 } // End isMoveImm = 1
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| H A D | VOP1Instructions.td | 112 let isMoveImm = should_mov_imm in {
168 } // End isMoveImm = 1
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| H A D | SOPInstructions.td | 157 let isMoveImm = 1 in {
167 } // End isMoveImm = 1
779 let isReMaterializable = 1, isMoveImm = 1 in {
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| H A D | VOPInstructions.td | 16 bit isMoveImm;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrFormats.td | 99 let isMoveImm = 1;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb2.td | 2147 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1,
2171 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in
2878 let isMoveImm = MoveImm;
3465 let isMoveImm = 1 in
3475 let isMoveImm = 1 in
3484 let isMoveImm = 1 in
3508 let isMoveImm = 1 in
4214 let isReMaterializable = 1, isMoveImm = 1 in
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| H A D | ARMInstrInfo.td | 3618 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in
3630 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in
4218 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in
5002 let isMoveImm = 1 in
5012 let isMoveImm = 1 in
5021 let isMoveImm = 1 in
5030 let isMoveImm = 1 in
5934 let isReMaterializable = 1, isMoveImm = 1 in
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| H A D | ARMInstrThumb.td | 1198 let isMoveImm = 1 in
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrFP.td | 38 let isAsCheapAsAMove = 1, isMoveImm = 1 in {
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| H A D | SystemZInstrInfo.td | 412 let isAsCheapAsAMove = 1, isMoveImm = 1, isReMaterializable = 1 in {
843 let isAsCheapAsAMove = 1, isMoveImm = 1, isReMaterializable = 1 in
928 let isAsCheapAsAMove = 1, isMoveImm = 1, isReMaterializable = 1 in {
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| H A D | SystemZInstrVector.td | 58 let isAsCheapAsAMove = 1, isMoveImm = 1, isReMaterializable = 1 in {
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.td | 279 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in {
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrPrefix.td | 857 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in {
867 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in {
1898 let isReMaterializable = 1, isMoveImm = 1, Predicates = [PrefixInstrs] in {
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| H A D | PPCInstr64Bit.td | 476 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in {
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| H A D | PPCInstrAltivec.td | 833 let isCodeGenOnly = 1, isMoveImm = 1, isAsCheapAsAMove = 1,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.td | 559 let isMoveImm = MoveImm;
966 let isMoveImm = MoveImm;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrCompiler.td | 171 let Constraints = "$src = $dst", isMoveImm = 1, isPseudo = 1, Defs = [EFLAGS] in {
286 isPseudo = 1, isMoveImm = 1, AddedComplexity = 10 in
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | Target.td | 523 bit isMoveImm = false; // Is this instruction a move immediate instruction?
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