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Searched refs:getNode (Results 1 – 25 of 196) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp333 AddToWorklist(Op.getNode()); in SimplifyDemandedBits()
873 AddToWorklist(Op.getNode()); in deleteAndRecombine()
911 !TLI.isConstTrueVal(N.getOperand(2).getNode()) || in isSetCCEquivalent()
912 !TLI.isConstFalseVal(N.getOperand(3).getNode())) in isSetCCEquivalent()
930 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse()) in isOneUseSetCC()
988 ISD::isBuildVectorOfConstantFPSDNodes(V.getNode()); in isAnyConstantBuildVector()
1068 return DAG.getNode(Opc, DL, VT, N0.getOperand(0), OpNode); in reassociateOpsCommutative()
1074 SDValue OpNode = DAG.getNode(Opc, SDLoc(N0), VT, N0.getOperand(0), N1); in reassociateOpsCommutative()
1075 if (!OpNode.getNode()) in reassociateOpsCommutative()
1077 return DAG.getNode(Opc, DL, VT, OpNode, N0.getOperand(1)); in reassociateOpsCommutative()
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H A DLegalizeIntegerTypes.cpp236 if (Res.getNode()) in PromoteIntegerResult()
249 return DAG.getNode(ISD::AssertSext, SDLoc(N), in PromoteIntRes_AssertSext()
256 return DAG.getNode(ISD::AssertZext, SDLoc(N), in PromoteIntRes_AssertZext()
349 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); in PromoteIntRes_BITCAST()
353 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST()
356 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftPromotedHalf(InOp)); in PromoteIntRes_BITCAST()
360 return DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, GetPromotedFloat(InOp)); in PromoteIntRes_BITCAST()
369 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
386 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST()
390 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); in PromoteIntRes_BITCAST()
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H A DLegalizeDAG.cpp222 UpdatedNodes->insert(New.getNode()); in ReplaceNode()
223 ReplacedNode(Old.getNode()); in ReplaceNode()
234 UpdatedNodes->insert(New[i].getNode()); in ReplaceNode()
245 UpdatedNodes->insert(New.getNode()); in ReplaceNodeWithValue()
246 ReplacedNode(Old.getNode()); in ReplaceNodeWithValue()
377 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in PerformInsertVectorEltInMemory()
405 SDValue ScVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, in ExpandINSERT_VECTOR_ELT()
480 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi); in OptimizeFloatStore()
498 if (SDNode *OptStore = OptimizeFloatStore(ST).getNode()) { in LegalizeStoreOps()
532 Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value); in LegalizeStoreOps()
[all …]
H A DTargetLowering.cpp434 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Call.second, in softenSetCCOperands()
436 NewLHS = DAG.getNode(ShouldInvertCC ? ISD::AND : ISD::OR, dl, in softenSetCCOperands()
512 return TLO.New.getNode(); in ShrinkDemandedConstant()
533 SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC); in ShrinkDemandedConstant()
562 assert(Op.getNode()->getNumValues() == 1 && in ShrinkDemandedOp()
574 if (!Op.getNode()->hasOneUse()) in ShrinkDemandedOp()
589 SDValue X = DAG.getNode( in ShrinkDemandedOp()
591 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)), in ShrinkDemandedOp()
592 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1))); in ShrinkDemandedOp()
594 SDValue Z = DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), X); in ShrinkDemandedOp()
[all …]
H A DResourcePriorityQueue.cpp78 const SDNode *ScegN = PredSU->getNode(); in numberRCValPredInSU()
116 const SDNode *ScegN = SuccSU->getNode(); in numberRCValSuccInSU()
135 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in numberRCValSuccInSU()
244 if (!SU || !SU->getNode()) in isResourceAvailable()
249 if (SU->getNode()->getGluedNode()) in isResourceAvailable()
254 if (SU->getNode()->isMachineOpcode()) in isResourceAvailable()
255 switch (SU->getNode()->getMachineOpcode()) { in isResourceAvailable()
258 SU->getNode()->getMachineOpcode()))) in isResourceAvailable()
289 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) { in reserveResources()
294 if (SU->getNode() && SU->getNode()->isMachineOpcode()) { in reserveResources()
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H A DLegalizeVectorTypes.cpp191 if (R.getNode()) in ScalarizeVectorResult()
198 return DAG.getNode(N->getOpcode(), SDLoc(N), in ScalarizeVecRes_BinOp()
206 return DAG.getNode(N->getOpcode(), SDLoc(N), Op0.getValueType(), Op0, Op1, in ScalarizeVecRes_TernaryOp()
214 return DAG.getNode(N->getOpcode(), SDLoc(N), Op0.getValueType(), Op0, Op1, in ScalarizeVecRes_FIX()
240 SDValue Result = DAG.getNode(N->getOpcode(), dl, DAG.getVTList(ValueVTs), in ScalarizeVecRes_StrictFPOp()
269 SDNode *ScalarNode = DAG.getNode( in ScalarizeVecRes_OverflowOp()
270 N->getOpcode(), DL, ScalarVTs, ScalarLHS, ScalarRHS).getNode(); in ScalarizeVecRes_OverflowOp()
279 SDValue OtherVal = DAG.getNode( in ScalarizeVecRes_OverflowOp()
300 return DAG.getNode(ISD::BITCAST, SDLoc(N), in ScalarizeVecRes_BITCAST()
310 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp); in ScalarizeVecRes_BUILD_VECTOR()
[all …]
H A DLegalizeTypesGeneric.cpp58 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
59 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
69 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
70 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
77 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
78 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
96 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
97 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
[all …]
H A DSelectionDAGBuilder.cpp204 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
205 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
211 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi); in getCopyFromParts()
225 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi); in getCopyFromParts()
227 DAG.getNode(ISD::SHL, DL, TotalVT, Hi, in getCopyFromParts()
230 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo); in getCopyFromParts()
231 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi); in getCopyFromParts()
238 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]); in getCopyFromParts()
239 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]); in getCopyFromParts()
242 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi); in getCopyFromParts()
[all …]
H A DLegalizeVectorOps.cpp255 SDNode *Node = DAG.UpdateNodeOperands(Op.getNode(), Ops); in LegalizeOp()
546 if (!Res.getNode()) in LowerOperationWrapper()
615 Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(j)); in Promote()
617 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(j)); in Promote()
623 DAG.getNode(Node->getOpcode(), dl, NVT, Operands, Node->getFlags()); in Promote()
628 Res = DAG.getNode(ISD::FP_ROUND, dl, VT, Res, DAG.getIntPtrConstant(0, dl)); in Promote()
630 Res = DAG.getNode(ISD::BITCAST, dl, VT, Res); in Promote()
654 Operands[j] = DAG.getNode(Opc, dl, NVT, Node->getOperand(j)); in PromoteINT_TO_FP()
660 SDValue Res = DAG.getNode(Node->getOpcode(), dl, in PromoteINT_TO_FP()
668 DAG.getNode(Node->getOpcode(), dl, Node->getValueType(0), Operands); in PromoteINT_TO_FP()
[all …]
H A DLegalizeFloatTypes.cpp150 if (R.getNode()) { in SoftenFloatResult()
151 assert(R.getNode() != N); in SoftenFloatResult()
202 return DAG.getNode(ISD::FREEZE, SDLoc(N), Ty, in SoftenFloatRes_FREEZE()
214 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), in SoftenFloatRes_BUILD_PAIR()
247 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), in SoftenFloatRes_EXTRACT_VECTOR_ELT()
261 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask); in SoftenFloatRes_FABS()
321 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN()
325 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit); in SoftenFloatRes_FCOPYSIGN()
331 DAG.getNode(ISD::SRL, dl, RVT, SignBit, in SoftenFloatRes_FCOPYSIGN()
335 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp572 const auto Flags = Op.getNode()->getFlags(); in mayIgnoreSignedZero()
823 if (!allUsesHaveSourceMods(Op.getNode())) in getNegatedExpression()
1134 return DAG.getNode(AMDGPUISD::ENDPGM, DL, MVT::Other, Chain); in LowerReturn()
1166 for (SDNode::use_iterator U = DAG.getEntryNode().getNode()->use_begin(), in addTokenForArgument()
1167 UE = DAG.getEntryNode().getNode()->use_end(); in addTokenForArgument()
1185 return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains); in addTokenForArgument()
1322 SDValue Trap = DAG.getNode(ISD::TRAP, DL, MVT::Other, DAG.getEntryNode()); in LowerGlobalAddress()
1323 SDValue OutputChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, in LowerGlobalAddress()
1354 SDValue Lo = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(0)); in LowerCONCAT_VECTORS()
1355 SDValue Hi = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(1)); in LowerCONCAT_VECTORS()
[all …]
H A DR600ISelLowering.cpp465 assert((!Result.getNode() || in LowerOperation()
466 Result.getNode()->getNumValues() == 2) && in LowerOperation()
491 return DAG.getNode(AMDGPUISD::R600_EXPORT, DL, Op.getValueType(), Args); in LowerOperation()
541 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, MVT::v4f32, TexArgs); in LowerOperation()
545 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
547 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
549 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
551 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
553 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
555 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/BinaryFormat/
H A DMsgPackDocument.cpp31 return find(getDocument()->getNode(S)); in find()
37 return (*this)[getDocument()->getNode(S)]; in operator []()
53 return (*this)[getDocument()->getNode(Key)]; in operator []()
56 return (*this)[getDocument()->getNode(Key)]; in operator []()
59 return (*this)[getDocument()->getNode(Key)]; in operator []()
62 return (*this)[getDocument()->getNode(Key)]; in operator []()
80 *this = getDocument()->getNode(Val); in operator =()
84 *this = getDocument()->getNode(Val); in operator =()
88 *this = getDocument()->getNode(Val); in operator =()
92 *this = getDocument()->getNode(Val); in operator =()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp319 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps); in getInt()
366 return DAG.getNode(ISD::CONCAT_VECTORS, dl, typeJoin(ty(Ops)), in opJoin()
434 return DAG.getNode(ISD::SHL, dl, MVT::i32, in convertToByteIndex()
450 SDValue SubIdx = DAG.getNode(ISD::AND, dl, MVT::i32, {Idx, Mask}); in getIndexInWord32()
518 if (!SplatV.getNode()) in buildHvxVectorReg()
526 assert(SplatV.getNode()); in buildHvxVectorReg()
527 auto *IdxN = dyn_cast<ConstantSDNode>(SplatV.getNode()); in buildHvxVectorReg()
531 SDValue S = DAG.getNode(ISD::SPLAT_VECTOR, dl, WordTy, SplatV); in buildHvxVectorReg()
569 if (Vec.getNode() != nullptr && T.getNode() != Vec.getNode()) in buildHvxVectorReg()
626 SDValue N = DAG.getNode(HexagonISD::VINSERTW0, dl, VecTy, in buildHvxVectorReg()
[all …]
H A DHexagonISelDAGToDAG.cpp70 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue(); in SelectIndexedLoad()
241 SelectStore(TS.getNode()); in StoreInstrForLoadIntrinsic()
242 StoreN = Handle.getValue().getNode(); in StoreInstrForLoadIntrinsic()
272 SDNode *C = Ch.getNode(); in tryLoadOfLoadIntrinsic()
300 if (C->getNumOperands() < 4 || Loc.getNode() != C->getOperand(3).getNode()) in tryLoadOfLoadIntrinsic()
469 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue(); in SelectIndexedStore()
686 SDValue R = CurDAG->getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), in SelectIntrinsicWOChain()
688 ReplaceNode(N, R.getNode()); in SelectIntrinsicWOChain()
689 SelectCode(R.getNode()); in SelectIntrinsicWOChain()
805 ReplaceNode(N, E.getNode()); in SelectVAlign()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp2064 Val = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocVT.getSizeInBits()), in MoveToHPR()
2067 Val = DAG.getNode(ARMISD::VMOVhr, dl, ValVT, Val); in MoveToHPR()
2069 Val = DAG.getNode(ISD::TRUNCATE, dl, in MoveToHPR()
2071 Val = DAG.getNode(ISD::BITCAST, dl, ValVT, Val); in MoveToHPR()
2080 Val = DAG.getNode(ARMISD::VMOVrh, dl, in MoveFromHPR()
2083 Val = DAG.getNode(ISD::BITCAST, dl, in MoveFromHPR()
2085 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, in MoveFromHPR()
2088 return DAG.getNode(ISD::BITCAST, dl, LocVT, Val); in MoveFromHPR()
2132 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2135 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp214 case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG); in LowerOperation()
255 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
260 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
262 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
293 GA = DAG.getNode(ISD::ADD, DL, MVT::i32, GA, Remaining); in LowerGlobalAddress()
318 return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, PtrVT, Result); in LowerBlockAddress()
336 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res); in LowerConstantPool()
358 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index); in LowerBR_JT()
361 SDValue ScaledIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index, in LowerBR_JT()
363 return DAG.getNode(XCoreISD::BR_JT32, dl, MVT::Other, Chain, TargetJT, in LowerBR_JT()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1630 New = TLO.DAG.getNode(Op.getOpcode(), DL, VT, Op.getOperand(0), in optimizeLogicalImm()
2207 N = N->getOperand(0).getNode(); in isZerosVector()
2406 return DAG.getNode(Opcode, dl, {VT, MVT::Other}, {Chain, LHS, RHS}); in emitStrictFPComparison()
2418 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS); in emitComparison()
2419 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS); in emitComparison()
2422 return DAG.getNode(AArch64ISD::FCMP, dl, VT, LHS, RHS); in emitComparison()
2445 const SDValue ANDSNode = DAG.getNode(AArch64ISD::ANDS, dl, in emitComparison()
2458 return DAG.getNode(Opcode, dl, DAG.getVTList(VT, MVT_CC), LHS, RHS) in emitComparison()
2527 LHS = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, LHS); in emitConditionalComparison()
2528 RHS = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, RHS); in emitConditionalComparison()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZSelectionDAGInfo.cpp41 return DAG.getNode(Loop, DL, MVT::Other, Chain, Dst, Src, in emitMemMem()
44 return DAG.getNode(Sequence, DL, MVT::Other, Chain, Dst, Src, in emitMemMem()
103 Dst = DAG.getNode(ISD::ADD, DL, PtrVT, Dst, in EmitTargetCodeForMemset()
109 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2); in EmitTargetCodeForMemset()
118 SDValue Dst2 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst, in EmitTargetCodeForMemset()
122 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2); in EmitTargetCodeForMemset()
136 SDValue DstPlus1 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst, in EmitTargetCodeForMemset()
159 return DAG.getNode(SystemZISD::CLC_LOOP, DL, VTs, Chain, Src1, Src2, in emitCLC()
162 return DAG.getNode(SystemZISD::CLC, DL, VTs, Chain, Src1, Src2, in emitCLC()
172 SDValue IPM = DAG.getNode(SystemZISD::IPM, DL, MVT::i32, CCReg); in addIPMSequence()
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H A DSystemZISelDAGToDAG.cpp78 if (Base.getNode()) in dump()
79 Base.getNode()->dump(DAG); in dump()
85 if (Index.getNode()) in dump()
86 Index.getNode()->dump(DAG); in dump()
433 if (AM.hasIndexField() && !AM.Index.getNode()) { in expandIndex()
591 (AM.Index.getNode() && expandAddress(AM, false))) in selectAddress()
596 !shouldUseLA(AM.Base.getNode(), AM.Disp, AM.Index.getNode())) in selectAddress()
618 (SelectionDAGISel::getUninvalidatedNodeId(N.getNode()) > in insertDAGNode()
620 DAG->RepositionNode(Pos->getIterator(), N.getNode()); in insertDAGNode()
626 SelectionDAGISel::InvalidateNodeId(N.getNode()); in insertDAGNode()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1260 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT, DAG.getUNDEF(VT), V, Zero); in convertToScalableVector()
1272 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, V, Zero); in convertFromScalableVector()
1287 SDValue Mask = DAG.getNode(RISCVISD::VMSET_VL, DL, MaskVT, VL); in getDefaultVLOps()
1333 SDValue Splat = DAG.getNode(Opc, DL, ContainerVT, Op.getOperand(0), VL); in lowerSPLAT_VECTOR()
1352 if (ISD::isBuildVectorAllZeros(Op.getNode())) { in lowerBUILD_VECTOR()
1353 SDValue VMClr = DAG.getNode(RISCVISD::VMCLR_VL, DL, ContainerVT, VL); in lowerBUILD_VECTOR()
1357 if (ISD::isBuildVectorAllOnes(Op.getNode())) { in lowerBUILD_VECTOR()
1358 SDValue VMSet = DAG.getNode(RISCVISD::VMSET_VL, DL, ContainerVT, VL); in lowerBUILD_VECTOR()
1372 if (ISD::isBuildVectorOfConstantSDNodes(Op.getNode())) { in lowerBUILD_VECTOR()
1396 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, IntegerViaVecVT, Vec, in lowerBUILD_VECTOR()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp354 if (Result.getNode()) { in LowerAsmOperandForConstraint()
471 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
474 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
520 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Copy, Chain); in LowerCCCArguments()
586 if (Flag.getNode()) in LowerReturn()
590 return DAG.getNode(Opc, DL, MVT::Other, in LowerReturn()
667 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
670 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
673 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2440 return DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(), in getPICJumpTableRelocBase()
2626 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, Dl, ValLoc, ValArg, in lowerMasksToReg()
2637 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValToCopy); in lowerMasksToReg()
2648 return DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValArg); in lowerMasksToReg()
2667 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg, in Passv64i1ArgInRegs()
2669 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg, in Passv64i1ArgInRegs()
2714 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
2716 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
2721 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
2750 ValToCopy = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f80, ValToCopy); in LowerReturn()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp419 SDValue Tmp = DAG.getNode(MipsISD::MTC1_D64, DL, MVT::f64, Op->getOperand(0)); in lowerSELECT()
420 return DAG.getNode(MipsISD::FSELECT, DL, ResTy, Tmp, Op->getOperand(1), in lowerSELECT()
516 return DAG.getNode(MipsISD::VEXTRACT_ZEXT_ELT, SDLoc(Op0), in performANDCombine()
535 BuildVectorSDNode *Node = dyn_cast<BuildVectorSDNode>(N.getNode()); in isVSplat()
643 if (!IfClr.getNode() && isVSplat(Op0Op1, Mask, IsLittleEndian)) { in performORCombine()
660 if (!IfClr.getNode()) { in performORCombine()
697 if (!IfClr.getNode()) in performORCombine()
700 assert(Cond.getNode() && IfSet.getNode()); in performORCombine()
711 return DAG.getNode(ISD::VSELECT, SDLoc(N), Ty, Cond, IfSet, IfClr); in performORCombine()
805 return DAG.getNode(ISD::SHL, DL, VT, X, in genConstMult()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp242 SDValue Part0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, in LowerReturn_32()
245 SDValue Part1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, in LowerReturn_32()
282 if (Flag.getNode()) in LowerReturn_32()
285 return DAG.getNode(SPISD::RET_FLAG, DL, MVT::Other, RetOps); in LowerReturn_32()
323 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
326 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
329 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
338 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal, in LowerReturn_64()
344 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]); in LowerReturn_64()
345 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV); in LowerReturn_64()
[all …]

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