| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| H A D | intel_fbc.c | 68 static unsigned int get_crtc_fence_y_offset(struct intel_fbc *fbc) in get_crtc_fence_y_offset() argument 70 return fbc->state_cache.plane.y - fbc->state_cache.plane.adjusted_y; in get_crtc_fence_y_offset() 124 struct intel_fbc_reg_params *params = &dev_priv->fbc.params; in i8xx_fbc_activate() 175 struct intel_fbc_reg_params *params = &dev_priv->fbc.params; in g4x_fbc_activate() 221 struct intel_fbc_reg_params *params = &dev_priv->fbc.params; in ilk_fbc_activate() 223 int threshold = dev_priv->fbc.threshold; in ilk_fbc_activate() 286 struct intel_fbc_reg_params *params = &dev_priv->fbc.params; in gen7_fbc_activate() 288 int threshold = dev_priv->fbc.threshold; in gen7_fbc_activate() 333 if (dev_priv->fbc.false_color) in gen7_fbc_activate() 369 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_hw_activate() local [all …]
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| H A D | intel_sprite.c | 2971 struct intel_fbc *fbc = &dev_priv->fbc; in skl_universal_plane_create() local 2973 fbc->possible_framebuffer_bits |= plane->frontbuffer_bit; in skl_universal_plane_create()
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| H A D | intel_display.c | 16177 struct intel_fbc *fbc = &dev_priv->fbc; in intel_primary_plane_create() local 16179 fbc->possible_framebuffer_bits |= plane->frontbuffer_bit; in intel_primary_plane_create()
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| /netbsd-src/sys/dev/sun/ |
| H A D | cgsix.c | 296 #define CG6_DRAIN(fbc) do { \ argument 297 while ((fbc)->fbc_s & GX_INPROGRESS) \ 309 #define CG6_WAIT_READY(fbc) do { \ argument 310 while (((fbc)->fbc_s & GX_INPROGRESS/*GX_FULL*/) != 0) \ 323 volatile struct cg6_fbc *fbc = sc->sc_fbc; in cg6_ras_init() local 325 CG6_DRAIN(fbc); in cg6_ras_init() 326 fbc->fbc_mode &= ~CG6_MODE_MASK; in cg6_ras_init() 327 fbc->fbc_mode |= CG6_MODE; in cg6_ras_init() 330 fbc->fbc_clip = 0; in cg6_ras_init() 331 fbc->fbc_s = 0; in cg6_ras_init() [all …]
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| H A D | cgthree.c | 168 volatile struct fbcontrol *fbc = sc->sc_fbc; in cgthreeattach() local 169 volatile struct bt_regs *bt = &fbc->fbc_dac; in cgthreeattach() 178 if ((fbc->fbc_ctrl & FBC_TIMING) == 0) { in cgthreeattach() 179 int sense = (fbc->fbc_status & FBS_MSENSE); in cgthreeattach() 189 fbc->fbc_vcontrol[j] = in cgthreeattach() 191 fbc->fbc_ctrl |= FBC_TIMING; in cgthreeattach()
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| /netbsd-src/sys/dev/ic/ |
| H A D | opl.c | 519 u_int8_t chars0, chars1, ksl0, ksl1, fbc; in oplsyn_setv() local 547 fbc = p->ops[OO_FB_CONN]; in oplsyn_setv() 549 fbc &= ~OPL_STEREO_BITS; in oplsyn_setv() 550 fbc |= sc->pan[chan]; in oplsyn_setv() 552 opl_set_ch_reg(sc, OPL_FEEDBACK_CONNECTION, voice, fbc); in oplsyn_setv()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/ |
| H A D | intel_pm.c | 974 FW_WM(wm->sr.fbc, FBC_SR) | in g4x_write_wm_values() 975 FW_WM(wm->hpll.fbc, FBC_HPLL_SR) | in g4x_write_wm_values() 1210 dirty |= raw->fbc != value; in g4x_raw_fbc_wm_set() 1211 raw->fbc = value; in g4x_raw_fbc_wm_set() 1266 dirty |= raw->fbc != wm; in g4x_raw_plane_wm_compute() 1267 raw->fbc = wm; in g4x_raw_plane_wm_compute() 1288 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, in g4x_raw_plane_wm_compute() 1289 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc); in g4x_raw_plane_wm_compute() 1331 wm_state->sr.fbc = USHRT_MAX; in g4x_invalidate_wms() 1338 wm_state->hpll.fbc = USHRT_MAX; in g4x_invalidate_wms() [all …]
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| H A D | i915_debugfs.c | 1242 struct intel_fbc *fbc = &dev_priv->fbc; in i915_fbc_status() local 1249 mutex_lock(&fbc->lock); in i915_fbc_status() 1254 seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason); in i915_fbc_status() 1274 mutex_unlock(&fbc->lock); in i915_fbc_status() 1287 *val = dev_priv->fbc.false_color; in i915_fbc_false_color_get() 1300 mutex_lock(&dev_priv->fbc.lock); in i915_fbc_false_color_set() 1303 dev_priv->fbc.false_color = val; in i915_fbc_false_color_set() 1309 mutex_unlock(&dev_priv->fbc.lock); in i915_fbc_false_color_set()
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| H A D | i915_drv.h | 763 u16 fbc; member 769 u16 fbc; member 1004 struct intel_fbc fbc; member
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| H A D | i915_reg.h | 6234 #define HSW_WM_LP_VAL(lat, fbc, pri, cur) \ argument 6236 ((fbc) << WM1_LP_FBC_SHIFT) | ((pri) << WM1_LP_SR_SHIFT) | (cur))
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| /netbsd-src/lib/libc/gdtoa/test/ |
| H A D | x.ou0 | 27 with bits = #3fbc e857 267b b3a9 84f2 31 fI[0] = #3fbc e857 267b b3a9 84f2 32 fI[1] = #3fbc e857 267b b3a9 84f3 85 with bits = #3fbc e934 a38 f3d6 d352 89 fI[0] = #3fbc e934 a38 f3d6 d352 90 fI[1] = #3fbc e934 a38 f3d6 d353 169 with bits = #3fbc e857 267b b3a9 84f2 173 fI[0] = #3fbc e857 267b b3a9 84f2 174 fI[1] = #3fbc e857 267b b3a9 84f3
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| H A D | x.ou1 | 31 with bits = #3fbc e857 267b b3a9 84f2 36 fI[0] = #3fbc e857 267b b3a9 84f2 38 fI[1] = #3fbc e857 267b b3a9 84f3 102 with bits = #3fbc e934 a38 f3d6 d352 107 fI[0] = #3fbc e934 a38 f3d6 d352 109 fI[1] = #3fbc e934 a38 f3d6 d353 207 with bits = #3fbc e857 267b b3a9 84f2 212 fI[0] = #3fbc e857 267b b3a9 84f2 214 fI[1] = #3fbc e857 267b b3a9 84f3
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| /netbsd-src/sys/arch/sparc64/dev/ |
| H A D | ffb.c | 628 uint32_t fbc; in ffb_ras_init() local 632 fbc = FFB_FBC_WM_COMBINED | FFB_FBC_WE_FORCEON | in ffb_ras_init() 636 fbc = FFB_FBC_XE_OFF; in ffb_ras_init() 646 fbc |= FFB_FBC_WB_A | FFB_FBC_RB_A | FFB_FBC_SB_BOTH | in ffb_ras_init() 648 DPRINTF(("%s: fbc is %08x\n", __func__, fbc)); in ffb_ras_init() 649 FBC_WRITE(sc, FFB_FBC_FBC, fbc); in ffb_ras_init()
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| /netbsd-src/external/gpl3/gcc.old/dist/libcpp/ |
| H A D | ucnid.tab | 34 1f5d 1f5f-1f7d 1f80-1fb4 1fb6-1fbc 1fc2-1fc4 1fc6-1fcc 1fd0-1fd3 135 1f5d 1f5f-1f7d 1f80-1fb4 1fb6-1fbc 1fc2-1fc4 1fc6-1fcc 1fd0-1fd3
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| /netbsd-src/external/gpl3/gcc/dist/libcpp/ |
| H A D | ucnid.tab | 34 1f5d 1f5f-1f7d 1f80-1fb4 1fb6-1fbc 1fc2-1fc4 1fc6-1fcc 1fd0-1fd3 135 1f5d 1f5f-1f7d 1f80-1fb4 1fb6-1fbc 1fc2-1fc4 1fc6-1fcc 1fd0-1fd3
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| /netbsd-src/sys/arch/m68k/060sp/dist/ |
| H A D | fplsp.sa | 1357 dc.l $06413fff,$6000fed2,$4a106bff,$00001fbc
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