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Searched refs:XLenVT (Results 1 – 15 of 15) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp81 MVT XLenVT = Subtarget.getXLenVT(); in RISCVTargetLowering() local
84 addRegisterClass(XLenVT, &RISCV::GPRRegClass); in RISCVTargetLowering()
167 setLoadExtAction(N, XLenVT, MVT::i1, Promote); in RISCVTargetLowering()
170 setOperationAction(ISD::DYNAMIC_STACKALLOC, XLenVT, Expand); in RISCVTargetLowering()
173 setOperationAction(ISD::BR_CC, XLenVT, Expand); in RISCVTargetLowering()
175 setOperationAction(ISD::SELECT_CC, XLenVT, Expand); in RISCVTargetLowering()
205 setOperationAction(ISD::MUL, XLenVT, Expand); in RISCVTargetLowering()
206 setOperationAction(ISD::MULHS, XLenVT, Expand); in RISCVTargetLowering()
207 setOperationAction(ISD::MULHU, XLenVT, Expand); in RISCVTargetLowering()
208 setOperationAction(ISD::SDIV, XLenVT, Expand); in RISCVTargetLowering()
[all …]
H A DRISCVInstrInfoVVLPatterns.td26 SDTCisVT<2, XLenVT>]>;
28 SDTCisVT<2, XLenVT>]>;
35 SDTCisVT<4, XLenVT>]>;
41 SDTCisVT<3, XLenVT>]>;
47 SDTCisVT<4, XLenVT>]>;
51 SDTCisVT<1, XLenVT>,
52 SDTCisVT<2, XLenVT>]>>;
56 SDTCisVT<2, XLenVT>]>>;
60 SDTCisVT<2, XLenVT>,
61 SDTCisVT<3, XLenVT>]>>;
[all …]
H A DRISCVISelDAGToDAG.cpp48 MVT XLenVT) { in selectImm() argument
49 RISCVMatInt::InstSeq Seq = RISCVMatInt::generateInstSeq(Imm, XLenVT == MVT::i64); in selectImm()
52 SDValue SrcReg = CurDAG->getRegister(RISCV::X0, XLenVT); in selectImm()
54 SDValue SDImm = CurDAG->getTargetConstant(Inst.Imm, DL, XLenVT); in selectImm()
56 Result = CurDAG->getMachineNode(RISCV::LUI, DL, XLenVT, SDImm); in selectImm()
58 Result = CurDAG->getMachineNode(Inst.Opc, DL, XLenVT, SrcReg, SDImm); in selectImm()
154 MVT XLenVT = Subtarget->getXLenVT(); in addVectorLoadStoreOperands() local
155 SDValue SEWOp = CurDAG->getTargetConstant(Log2_32(SEW), DL, XLenVT); in addVectorLoadStoreOperands()
208 MVT XLenVT = Subtarget->getXLenVT(); in selectVLSEGFF() local
230 SDNode *ReadVL = CurDAG->getMachineNode(RISCV::PseudoReadVL, DL, XLenVT, in selectVLSEGFF()
[all …]
H A DRISCVInstrInfoC.td21 def uimmlog2xlennonzero : Operand<XLenVT>, ImmLeaf<XLenVT, [{
39 def simm6 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<6>(Imm);}]> {
51 def simm6nonzero : Operand<XLenVT>,
52 ImmLeaf<XLenVT, [{return (Imm != 0) && isInt<6>(Imm);}]> {
64 def immzero : Operand<XLenVT>,
65 ImmLeaf<XLenVT, [{return (Imm == 0);}]> {
81 def c_lui_imm : Operand<XLenVT>,
82 ImmLeaf<XLenVT, [{return (Imm != 0) &&
98 def uimm7_lsb00 : Operand<XLenVT>,
99 ImmLeaf<XLenVT, [{return isShiftedUInt<5, 2>(Imm);}]> {
[all …]
H A DRISCVInstrInfo.td24 def SDT_RISCVCall : SDTypeProfile<0, -1, [SDTCisVT<0, XLenVT>]>;
121 def fencearg : Operand<XLenVT> {
135 def uimmlog2xlen : Operand<XLenVT>, ImmLeaf<XLenVT, [{
155 def uimm5 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isUInt<5>(Imm);}]> {
162 def simm12 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<12>(Imm);}]> {
191 class UImm20Operand : Operand<XLenVT> {
238 def bare_symbol : Operand<XLenVT> {
250 def call_symbol : Operand<XLenVT> {
262 def pseudo_jump_symbol : Operand<XLenVT> {
274 def tprel_add_symbol : Operand<XLenVT> {
[all …]
H A DRISCVSubtarget.h64 MVT XLenVT = MVT::i32; variable
130 MVT getXLenVT() const { return XLenVT; } in getXLenVT()
H A DRISCVRegisterInfo.td118 def XLenVT : ValueTypeByHwMode<[RV32, RV64],
126 def GPR : RegisterClass<"RISCV", [XLenVT], 32, (add
137 def GPRX0 : RegisterClass<"RISCV", [XLenVT], 32, (add X0)> {
143 def GPRNoX0 : RegisterClass<"RISCV", [XLenVT], 32, (add
154 def GPRNoX0X2 : RegisterClass<"RISCV", [XLenVT], 32, (add
165 def GPRC : RegisterClass<"RISCV", [XLenVT], 32, (add
175 def GPRTC : RegisterClass<"RISCV", [XLenVT], 32, (add
183 def SP : RegisterClass<"RISCV", [XLenVT], 32, (add X2)> {
H A DRISCVInstrInfoB.td47 def shfl_uimm : Operand<XLenVT>, ImmLeaf<XLenVT, [{
77 def BCLRMask : ImmLeaf<XLenVT, [{
84 def BSETINVMask : ImmLeaf<XLenVT, [{
748 def : Pat<(and (srl GPR:$rs1, uimmlog2xlen:$shamt), (XLenVT 1)),
803 def : Pat<(select (XLenVT (setne GPR:$rs2, 0)), GPR:$rs1, GPR:$rs3),
805 def : Pat<(select (XLenVT (seteq GPR:$rs2, 0)), GPR:$rs3, GPR:$rs1),
807 def : Pat<(select (XLenVT (setne GPR:$x, simm12_plus1:$y)), GPR:$rs1, GPR:$rs3),
809 def : Pat<(select (XLenVT (seteq GPR:$x, simm12_plus1:$y)), GPR:$rs3, GPR:$rs1),
811 def : Pat<(select (XLenVT (setne GPR:$x, GPR:$y)), GPR:$rs1, GPR:$rs3),
813 def : Pat<(select (XLenVT (seteq GPR:$x, GPR:$y)), GPR:$rs3, GPR:$rs1),
[all …]
H A DRISCVSubtarget.cpp67 XLenVT = MVT::i64; in initializeSubtargetDependencies()
H A DRISCVInstrInfoVPseudos.td21 SDTypeProfile<1, 0, [SDTCisVT<0, XLenVT>]>>;
36 def VLOp : ComplexPattern<XLenVT, 1, "selectVLOp">;
126 def VLOpFrag : PatFrag<(ops), (XLenVT (VLOp (XLenVT AVL:$vl)))>;
129 def VLMax : OutPatFrag<(ops), (XLenVT X0)>;
146 ValueType Scal = XLenVT, RegisterClass ScalarReg = GPR>
160 string ScalarSuffix = !cond(!eq(Scal, XLenVT) : "X",
167 VReg Reg, LMULInfo M, ValueType Scal = XLenVT,
2402 def : Pat<(XLenVT (!cast<Intrinsic>(intrinsic_name)
2406 def : Pat<(XLenVT (!cast<Intrinsic>(intrinsic_name # "_mask")
2489 (XLenVT (VLOp (XLenVT (XLenVT GPR:$vl)))))),
[all …]
H A DRISCVInstrInfoZfh.td21 : SDTypeProfile<1, 1, [SDTCisVT<0, f16>, SDTCisVT<1, XLenVT>]>;
23 : SDTypeProfile<1, 1, [SDTCisVT<0, XLenVT>, SDTCisVT<1, f16>]>;
H A DRISCVInstrInfoVSDPatterns.td32 SDTCisVT<1, XLenVT>]>;
37 (xor node:$in, (riscv_vmset_vl (XLenVT srcvalue)))>;
483 def : Pat<(vti.Vector (vselect (vti.Mask VMV0:$vm), (SplatPat XLenVT:$rs1),
H A DRISCVInstrInfoV.td28 def VTypeIOp : Operand<XLenVT> {
51 def simm5 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<5>(Imm);}]> {
69 def simm5_plus1 : Operand<XLenVT>, ImmLeaf<XLenVT,
H A DRISCVInstrInfoA.td65 ValueType vt = XLenVT> {
H A DRISCVInstrInfoF.td40 def frmarg : Operand<XLenVT> {