| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 4078 EVT WideVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in WidenVecRes_MGATHER() local 4083 unsigned NumElts = WideVT.getVectorNumElements(); in WidenVecRes_MGATHER() 4089 WideVT.getVectorNumElements()); in WidenVecRes_MGATHER() 4104 SDValue Res = DAG.getMaskedGather(DAG.getVTList(WideVT, MVT::Other), in WidenVecRes_MGATHER() 4317 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTMask() local 4318 if (ScalarBits_ToMask >= WideVT.getScalarSizeInBits()) in WidenVSELECTMask() 4319 MaskVT = WideVT; in WidenVSELECTMask() 4691 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, in WidenVecOp_Convert() local 4693 if (TLI.isTypeLegal(WideVT) && !N->isStrictFPOpcode()) { in WidenVecOp_Convert() 4697 Res = DAG.getNode(Opcode, dl, { WideVT, MVT::Other }, in WidenVecOp_Convert() [all …]
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| H A D | TargetLowering.cpp | 8398 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VT.getScalarSizeInBits() * 2); in expandMULO() local 8400 WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT, in expandMULO() 8415 } else if (isTypeLegal(WideVT)) { in expandMULO() 8416 LHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, LHS); in expandMULO() 8417 RHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, RHS); in expandMULO() 8418 SDValue Mul = DAG.getNode(ISD::MUL, dl, WideVT, LHS, RHS); in expandMULO() 8421 getShiftAmountTy(WideVT, DAG.getDataLayout())); in expandMULO() 8423 DAG.getNode(ISD::SRL, dl, WideVT, Mul, ShiftAmt)); in expandMULO() 8433 if (WideVT == MVT::i16) in expandMULO() 8435 else if (WideVT == MVT::i32) in expandMULO() [all …]
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| H A D | LegalizeIntegerTypes.cpp | 926 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VTSize * 2); in earlyExpandDIVFIX() local 928 WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT, in earlyExpandDIVFIX() 931 LHS = DAG.getSExtOrTrunc(LHS, dl, WideVT); in earlyExpandDIVFIX() 932 RHS = DAG.getSExtOrTrunc(RHS, dl, WideVT); in earlyExpandDIVFIX() 934 LHS = DAG.getZExtOrTrunc(LHS, dl, WideVT); in earlyExpandDIVFIX() 935 RHS = DAG.getZExtOrTrunc(RHS, dl, WideVT); in earlyExpandDIVFIX()
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| H A D | DAGCombiner.cpp | 7293 EVT WideVT = EVT::getIntegerVT(Context, WideNumBits); in mergeTruncStores() local 7294 if (WideVT != MVT::i16 && WideVT != MVT::i32 && WideVT != MVT::i64) in mergeTruncStores() 7336 else if (SourceValue.getValueType() != WideVT) { in mergeTruncStores() 7337 if (WideVal.getValueType() == WideVT || in mergeTruncStores() 7342 if (SourceValue.getScalarValueSizeInBits() < WideVT.getScalarSizeInBits()) in mergeTruncStores() 7372 bool Allowed = TLI.allowsMemoryAccess(Context, Layout, WideVT, in mergeTruncStores() 7406 if (WideVT != SourceValue.getValueType()) { in mergeTruncStores() 7409 SourceValue = DAG.getNode(ISD::TRUNCATE, DL, WideVT, SourceValue); in mergeTruncStores() 7416 SourceValue = DAG.getNode(ISD::BSWAP, DL, WideVT, SourceValue); in mergeTruncStores() 7419 SDValue RotAmt = DAG.getConstant(WideNumBits / 2, DL, WideVT); in mergeTruncStores() [all …]
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| H A D | SelectionDAG.cpp | 10169 EVT WideVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(), in WidenVector() local 10171 return getNode(ISD::INSERT_SUBVECTOR, DL, WideVT, getUNDEF(WideVT), N, in WidenVector()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3901 EVT WideVT = MVT::i32; in lowerATOMIC_LOAD_OP() local 3902 if (NarrowVT == WideVT) in lowerATOMIC_LOAD_OP() 3928 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_LOAD_OP() 3932 SDValue NegBitShift = DAG.getNode(ISD::SUB, DL, WideVT, in lowerATOMIC_LOAD_OP() 3933 DAG.getConstant(0, DL, WideVT), BitShift); in lowerATOMIC_LOAD_OP() 3941 Src2 = DAG.getNode(ISD::SHL, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP() 3942 DAG.getConstant(32 - BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP() 3945 Src2 = DAG.getNode(ISD::OR, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP() 3946 DAG.getConstant(uint32_t(-1) >> BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP() 3949 SDVTList VTList = DAG.getVTList(WideVT, MVT::Other); in lowerATOMIC_LOAD_OP() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 13594 MVT WideVT = WideVec.getSimpleValueType(); in lowerShuffleOfExtractsAsVperm() local 13595 if (!WideVT.is256BitVector()) in lowerShuffleOfExtractsAsVperm() 13620 SDValue Shuf = DAG.getVectorShuffle(WideVT, DL, WideVec, DAG.getUNDEF(WideVT), in lowerShuffleOfExtractsAsVperm() 18136 MVT WideVT = VT; in lower1BitShuffleAsKSHIFTR() local 18138 WideVT = Subtarget.hasDQI() ? MVT::v8i1 : MVT::v16i1; in lower1BitShuffleAsKSHIFTR() 18139 SDValue Res = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideVT, in lower1BitShuffleAsKSHIFTR() 18140 DAG.getUNDEF(WideVT), V1, in lower1BitShuffleAsKSHIFTR() 18142 Res = DAG.getNode(X86ISD::KSHIFTR, DL, WideVT, Res, in lower1BitShuffleAsKSHIFTR() 18239 MVT WideVT = VT; in lower1BitShuffle() local 18241 WideVT = Subtarget.hasDQI() ? MVT::v8i1 : MVT::v16i1; in lower1BitShuffle() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 7747 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in LowerTRUNCATEVector() local 7763 Op2 = DAG.getUNDEF(WideVT); in LowerTRUNCATEVector() 7781 Op1 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op1); in LowerTRUNCATEVector() 7782 Op2 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op2); in LowerTRUNCATEVector() 7783 return DAG.getVectorShuffle(WideVT, DL, Op1, Op2, ShuffV); in LowerTRUNCATEVector() 8317 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in widenVec() local 8326 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WideVT, Ops); in widenVec() 8348 EVT WideVT = Wide.getValueType(); in LowerINT_TO_FPVector() local 8349 unsigned WideNumElts = WideVT.getVectorNumElements(); in LowerINT_TO_FPVector() 8366 SignedConv ? DAG.getUNDEF(WideVT) : DAG.getConstant(0, dl, WideVT); in LowerINT_TO_FPVector() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1630 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectLoadLane() local 1634 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane() 1682 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectPostLoadLane() local 1686 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 10191 EVT WideVT = InVT.widenIntegerVectorElementType(*(DAG.getContext())); in LowerINSERT_SUBVECTOR() local 10192 SDValue ExtVec = DAG.getNode(ISD::ANY_EXTEND, DL, WideVT, Vec1); in LowerINSERT_SUBVECTOR() 10195 SDValue HiVec0 = DAG.getNode(AArch64ISD::UUNPKHI, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR() 10198 SDValue LoVec0 = DAG.getNode(AArch64ISD::UUNPKLO, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1792 EVT WideVT = WideVal.getValueType(); in EmitTest() local 1819 if (TLI.isOperationLegal(WideVal.getOpcode(), WideVT)) { in EmitTest()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 3112 MVT WideVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorElementCount()); in lowerINSERT_VECTOR_ELT() local 3113 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec); in lowerINSERT_VECTOR_ELT() 3114 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideVT, Vec, Val, Idx); in lowerINSERT_VECTOR_ELT() 3210 MVT WideVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorElementCount()); in lowerEXTRACT_VECTOR_ELT() local 3211 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec); in lowerEXTRACT_VECTOR_ELT()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2947 EVT WideVT = MVT::i128; in LowerUMULO_SMULO() local 2964 RTLIB::MUL_I128, WideVT, in LowerUMULO_SMULO()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1598 EVT WideVT = in WidenOrSplitVectorLoad() local 1603 Load->getExtensionType(), SL, WideVT, Load->getChain(), BasePtr, SrcValue, in WidenOrSplitVectorLoad()
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