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Searched refs:SPLL_REF_DIV (Results 1 – 20 of 20) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Drv740d.h32 #define SPLL_REF_DIV(x) ((x) << 4) macro
H A Drv730d.h33 #define SPLL_REF_DIV(x) ((x) << 4) macro
H A Drs780d.h31 # define SPLL_REF_DIV(x) ((x) << 2) macro
H A Dradeon_rv740_dpm.c153 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv740_populate_sclk_value()
H A Dradeon_rv730_dpm.c84 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv730_populate_sclk_value()
H A Drv770d.h96 #define SPLL_REF_DIV(x) ((x) << 4) macro
H A Dnid.h544 #define SPLL_REF_DIV(x) ((x) << 4) macro
H A Dsid.h91 #define SPLL_REF_DIV(x) ((x) << 4) macro
H A Dcikd.h254 #define SPLL_REF_DIV(x) ((x) << 5) macro
H A Devergreend.h80 #define SPLL_REF_DIV(x) ((x) << 4) macro
H A Dr600d.h1275 # define SPLL_REF_DIV(x) ((x) << 2) macro
H A Dradeon_rv770_dpm.c531 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv770_populate_sclk_value()
H A Dradeon_ni_dpm.c2034 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in ni_calculate_sclk_params()
H A Dradeon_si_dpm.c4816 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in si_calculate_sclk_params()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsid.h93 #define SPLL_REF_DIV(x) ((x) << 4) macro
H A Damdgpu_si_dpm.c5280 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in si_calculate_sclk_params()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_fiji_smumgr.c893 SPLL_REF_DIV, dividers.uc_pll_ref_div); in fiji_calculate_sclk_params()
H A Damdgpu_iceland_smumgr.c831 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div); in iceland_calculate_sclk_params()
H A Damdgpu_ci_smumgr.c331 SPLL_REF_DIV, dividers.uc_pll_ref_div); in ci_calculate_sclk_params()
H A Damdgpu_tonga_smumgr.c574 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div); in tonga_calculate_sclk_params()