| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 54 class Reduction; 85 class Reduction { class 93 Reduction() = delete; 95 Reduction (Instruction *Add) : Root(Add) { } in Reduction() function in __anon5cd7b9340111::Reduction 225 bool Search(Value *V, BasicBlock *BB, Reduction &R); 227 void InsertParallelMACs(Reduction &Reduction); 230 bool CreateParallelPairs(Reduction &R); 440 bool ARMParallelDSP::Search(Value *V, BasicBlock *BB, Reduction &R) { in Search() 533 Reduction R(&I); in MatchSMLAD() 552 bool ARMParallelDSP::CreateParallelPairs(Reduction &R) { in CreateParallelPairs() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCV.td | 111 "'Zbr' (Polynomial Reduction 'B' Instructions)">; 114 "'Zbr' (Polynomial Reduction 'B' Instructions)">;
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| H A D | RISCVInstrInfoV.td | 893 // Vector Single-Width Integer Reduction Instructions 905 // Vector Widening Integer Reduction Instructions 917 // Vector Single-Width Floating-Point Reduction Instructions 925 // Vector Widening Floating-Point Reduction Instructions
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| H A D | RISCVInstrInfoVPseudos.td | 3693 // 15.1. Vector Single-Width Integer Reduction Instructions 3705 // 15.2. Vector Widening Integer Reduction Instructions 3713 // 15.3. Vector Single-Width Floating-Point Reduction Instructions 3721 // 15.4. Vector Widening Floating-Point Reduction Instructions 4360 // 15.1. Vector Single-Width Integer Reduction Instructions 4372 // 15.2. Vector Widening Integer Reduction Instructions 4380 // 15.3. Vector Single-Width Floating-Point Reduction Instructions 4388 // 15.4. Vector Widening Floating-Point Reduction Instructions
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| H A D | RISCVInstrInfoVVLPatterns.td | 773 // 15.1. Vector Single-Width Integer Reduction Instructions 785 // 15.3. Vector Single-Width Floating-Point Reduction Instructions
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| H A D | RISCVISelLowering.cpp | 3600 SDValue Reduction = in lowerVECREDUCE() local 3602 SDValue Elt0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VecEltVT, Reduction, in lowerVECREDUCE() 3659 SDValue Reduction = in lowerFPVECREDUCE() local 3661 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VecEltVT, Reduction, in lowerFPVECREDUCE()
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| /netbsd-src/external/apache2/llvm/dist/llvm/docs/HistoricalNotes/ |
| H A D | 2001-06-01-GCCOptimizations.txt | 25 12. Strength Reduction
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| /netbsd-src/external/apache2/llvm/dist/clang/include/clang/Basic/ |
| H A D | arm_mve.td | 539 multiclass Reduction<Type Accumulator, string basename, list<Type> basetypes, 561 defm vminvq: Reduction<Scalar, "minv", [Vector], 1, (seq (Scalar $ret))>; 562 defm vmaxvq: Reduction<Scalar, "maxv", [Vector], 1, (seq (Scalar $ret))>; 566 defm vminavq: Reduction<UScalar, "minav", [Vector], 0, (seq (UScalar $ret))>; 567 defm vmaxavq: Reduction<UScalar, "maxav", [Vector], 0, (seq (UScalar $ret))>; 571 defm vminnmvq: Reduction<Scalar, "minnmv", [Scalar, Vector]>; 572 defm vmaxnmvq: Reduction<Scalar, "maxnmv", [Scalar, Vector]>; 573 defm vminnmavq: Reduction<Scalar, "minnmav", [Scalar, Vector]>; 574 defm vmaxnmavq: Reduction<Scalar, "maxnmav", [Scalar, Vector]>;
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| H A D | riscv_vector.td | 1410 // 15. Vector Reduction Operations 1411 // 15.1. Vector Single-Width Integer Reduction Instructions 1421 // 15.2. Vector Widening Integer Reduction Instructions 1422 // Vector Widening Integer Reduction Operations 1430 // 15.3. Vector Single-Width Floating-Point Reduction Instructions 1436 // 15.4. Vector Widening Floating-Point Reduction Instructions
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorizationLegality.cpp | 1236 for (auto &Reduction : getReductionVars()) in prepareToFoldTailByMasking() local 1237 ReductionLiveOuts.insert(Reduction.second.getLoopExitInstr()); in prepareToFoldTailByMasking()
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| H A D | LoopVectorize.cpp | 1512 return (all_of(Legal->getReductionVars(), [&](auto &Reduction) -> bool { in canVectorizeReductions() argument 1513 RecurrenceDescriptor RdxDesc = Reduction.second; in canVectorizeReductions() 7836 for (auto &Reduction : Legal->getReductionVars()) { in collectValuesToIgnore() local 7837 RecurrenceDescriptor &RedDes = Reduction.second; in collectValuesToIgnore() 7851 for (auto &Reduction : Legal->getReductionVars()) { in collectInLoopReductions() local 7852 PHINode *Phi = Reduction.first; in collectInLoopReductions() 7853 RecurrenceDescriptor &RdxDesc = Reduction.second; in collectInLoopReductions() 9018 for (auto &Reduction : CM.getInLoopReductionChains()) { in buildVPlanWithVPRecipes() local 9019 PHINode *Phi = Reduction.first; in buildVPlanWithVPRecipes() 9021 const SmallVector<Instruction *, 4> &ReductionOperations = Reduction.second; in buildVPlanWithVPRecipes() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/ |
| H A D | CODE_OWNERS.TXT | 79 D: Loop Strength Reduction, Register allocators
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/mips/ |
| H A D | mips-ps-3d.md | 350 ; addr.ps - Floating Point Reduction Add 393 ; mulr.ps - Floating Point Reduction Multiply
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/mips/ |
| H A D | mips-ps-3d.md | 350 ; addr.ps - Floating Point Reduction Add 393 ; mulr.ps - Floating Point Reduction Multiply
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/ |
| H A D | sdm630-sony-xperia-nile.dtsi | 389 * by the Core Power Reduction hardened (CPRh) and the
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| /netbsd-src/usr.bin/xlint/lint1/ |
| H A D | README.md | 219 | `switch (yyn)` | cgram.c | Reduction of a grammar rule |
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| /netbsd-src/external/mit/isl/dist/doc/ |
| H A D | isl.bib | 280 TITLE={An Implementation of the Generalized Basis Reduction Algorithm for Integer Programming},
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| H A D | IntrinsicsRISCV.td | 544 // For Reduction ternary operations. 552 // For Reduction ternary operations with mask.
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| H A D | Intrinsics.td | 1543 //===------------------------ Reduction Intrinsics ------------------------===//
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEInstrVec.td | 1306 // Section 8.14 - Vector Reduction Instructions 1366 // Section 8.14.7 - VRAND (Vector Reduction And) 1369 // Section 8.14.8 - VROR (Vector Reduction Or) 1372 // Section 8.14.9 - VRXOR (Vector Reduction Exclusive Or)
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| /netbsd-src/external/apache2/llvm/dist/llvm/docs/GlobalISel/ |
| H A D | GenericOpcode.rst | 603 Vector Reduction Operations
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| /netbsd-src/external/historical/nawk/dist/testdir/ |
| H A D | funstack.ok | 1245 C. R. Crawford Reduction of a Band-Symmetric 1765 Mary Shaw Reduction of Compilation Costs Through 2057 Jack Minker State-Space, Problem-Reduction, and 2068 C. A. R. Hoare Matrix Reduction --- an Efficient Method 2311 Richard J. Lipton Reduction: A Method of Proving 2858 Ken Kennedy An Algorithm for Reduction of Operator
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| /netbsd-src/external/apache2/llvm/dist/llvm/docs/ |
| H A D | Passes.rst | 773 ``-loop-reduce``: Loop Strength Reduction
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGOpenMPRuntime.cpp | 624 std::pair<llvm::Function *, llvm::Function *> Reduction = in emitInitWithReductionInitializer() local 640 RValue Func = RValue::get(Reduction.second); in emitInitWithReductionInitializer() 5403 std::pair<llvm::Function *, llvm::Function *> Reduction = in emitReductionCombiner() local 5405 RValue Func = RValue::get(Reduction.first); in emitReductionCombiner()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | SVEInstrFormats.td | 4631 // SVE Floating Point Fast Reduction Group 4667 // SVE Floating Point Accumulating Reduction Group 7366 // SVE Integer Reduction Group
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