| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 369 AtomicOrdering Ord) const override;
371 AtomicOrdering Ord) const override;
444 AtomicOrdering Ord) const override;
451 AtomicOrdering Ord) const override;
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| H A D | RISCVISelLowering.cpp | 8269 AtomicOrdering Ord) const { in emitLeadingFence()
8270 if (isa<LoadInst>(Inst) && Ord == AtomicOrdering::SequentiallyConsistent) in emitLeadingFence()
8271 return Builder.CreateFence(Ord); in emitLeadingFence()
8272 if (isa<StoreInst>(Inst) && isReleaseOrStronger(Ord)) in emitLeadingFence()
8279 AtomicOrdering Ord) const { in emitTrailingFence()
8280 if (isa<LoadInst>(Inst) && isAcquireOrStronger(Ord)) in emitTrailingFence()
8352 Value *Mask, Value *ShiftAmt, AtomicOrdering Ord) const { in emitMaskedAtomicRMWIntrinsic()
8404 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic()
8406 Value *Ordering = Builder.getIntN(XLen, static_cast<uint64_t>(Ord)); in emitMaskedAtomicCmpXchgIntrinsic()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.h | 96 AtomicOrdering Ord) const override;
98 AtomicOrdering Ord) const override;
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| H A D | VEISelLowering.cpp | 1002 AtomicOrdering Ord) const { in emitLeadingFence()
1003 switch (Ord) { in emitLeadingFence()
1023 AtomicOrdering Ord) const { in emitTrailingFence()
1024 switch (Ord) { in emitTrailingFence()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 107 Coloring(ArrayRef<Node> Ord) : Order(Ord) { in Coloring()
333 PermNetwork(ArrayRef<ElemType> Ord, unsigned Mult = 1) { in PermNetwork()
334 Order.assign(Ord.data(), Ord.data()+Ord.size()); in PermNetwork()
381 ForwardDeltaNetwork(ArrayRef<ElemType> Ord) : PermNetwork(Ord) {} in ForwardDeltaNetwork()
395 ReverseDeltaNetwork(ArrayRef<ElemType> Ord) : PermNetwork(Ord) {} in ReverseDeltaNetwork()
409 BenesNetwork(ArrayRef<ElemType> Ord) : PermNetwork(Ord, 2) {} in BenesNetwork()
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| H A D | HexagonISelLowering.h | 327 AtomicOrdering Ord) const override;
329 Value *Addr, AtomicOrdering Ord) const override;
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| H A D | HexagonGenInsert.cpp | 388 : MaxSize(MaxORLSize), Ord(RO) {} in OrderedRegisterList()
415 const RegisterOrdering &Ord; member in __anondbae7fc30311::OrderedRegisterList
444 iterator L = llvm::lower_bound(Seq, VR, Ord); in insert()
457 iterator L = llvm::lower_bound(Seq, VR, Ord); in remove()
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| H A D | HexagonISelLowering.cpp | 3557 AtomicOrdering Ord) const { in emitLoadLinked()
3580 Value *Val, Value *Addr, AtomicOrdering Ord) const { in emitStoreConditional()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | LocalStackSlotAllocation.cpp | 62 FrameRef(MachineInstr *I, int64_t Offset, int Idx, unsigned Ord) : in FrameRef() argument
63 MI(I), LocalOffset(Offset), FrameIdx(Idx), Order(Ord) {} in FrameRef()
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| /netbsd-src/regress/sys/uvm/pdsim/ |
| H A D | lfu.hs | 45 victim :: Ord b => [(a,b)] -> (a,b)
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 629 AtomicOrdering Ord) const override;
631 Value *Addr, AtomicOrdering Ord) const override;
636 AtomicOrdering Ord) const override;
638 AtomicOrdering Ord) const override;
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| H A D | ARMISelLowering.cpp | 4034 AtomicOrdering Ord = static_cast<AtomicOrdering>(OrdN->getZExtValue()); in LowerATOMIC_FENCE() local
4040 Ord == AtomicOrdering::Release) { in LowerATOMIC_FENCE()
19302 AtomicOrdering Ord) const { in emitLeadingFence()
19303 switch (Ord) { in emitLeadingFence()
19327 AtomicOrdering Ord) const { in emitTrailingFence()
19328 switch (Ord) { in emitTrailingFence()
19488 AtomicOrdering Ord) const { in emitLoadLinked()
19491 bool IsAcquire = isAcquireOrStronger(Ord); in emitLoadLinked()
19533 AtomicOrdering Ord) const { in emitStoreConditional()
19535 bool IsRelease = isReleaseOrStronger(Ord); in emitStoreConditional()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1866 AtomicOrdering Ord) const { in emitLoadLinked() argument
1873 Value *Addr, AtomicOrdering Ord) const { in emitStoreConditional() argument
1884 AtomicOrdering Ord) const { in emitMaskedAtomicRMWIntrinsic() argument
1893 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
1931 AtomicOrdering Ord) const { in emitLeadingFence() argument
1932 if (isReleaseOrStronger(Ord) && Inst->hasAtomicStore()) in emitLeadingFence()
1933 return Builder.CreateFence(Ord); in emitLeadingFence()
1940 AtomicOrdering Ord) const { in emitTrailingFence() argument
1941 if (isAcquireOrStronger(Ord)) in emitTrailingFence()
1942 return Builder.CreateFence(Ord); in emitTrailingFence()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64A57FPLoadBalancing.cpp | 519 auto Ord = RCI.getOrder(TRI->getRegClass(RegClassID)); in scavengeRegister() local
520 for (auto Reg : Ord) { in scavengeRegister()
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| H A D | AArch64ISelLowering.h | 653 AtomicOrdering Ord) const override;
655 Value *Addr, AtomicOrdering Ord) const override;
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| H A D | AArch64FastISel.cpp | 2173 AtomicOrdering Ord = SI->getOrdering(); in selectStore() local
2175 if (isReleaseOrStronger(Ord)) { in selectStore()
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| H A D | AArch64ISelLowering.cpp | 16902 AtomicOrdering Ord) const { in emitLoadLinked()
16905 bool IsAcquire = isAcquireOrStronger(Ord); in emitLoadLinked()
16948 AtomicOrdering Ord) const { in emitStoreConditional()
16950 bool IsRelease = isReleaseOrStronger(Ord); in emitStoreConditional()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/ObjectYAML/ |
| H A D | CodeViewYAMLSymbols.cpp | 190 ThunkOrdinal &Ord) { in enumeration() argument
193 io.enumCase(Ord, E.Name.str().c_str(), static_cast<ThunkOrdinal>(E.Value)); in enumeration()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 875 AtomicOrdering Ord) const override;
877 AtomicOrdering Ord) const override;
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| H A D | PPCISelLowering.cpp | 10957 AtomicOrdering Ord) const { in emitLeadingFence()
10958 if (Ord == AtomicOrdering::SequentiallyConsistent) in emitLeadingFence()
10960 if (isReleaseOrStronger(Ord)) in emitLeadingFence()
10967 AtomicOrdering Ord) const { in emitTrailingFence()
10968 if (Inst->hasAtomicLoad() && isAcquireOrStronger(Ord)) { in emitTrailingFence()
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| /netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-c-test/ |
| H A D | echo.cpp | 653 LLVMAtomicOrdering Ord = LLVMGetOrdering(Src); in CloneInstruction() local
655 Dst = LLVMBuildAtomicRMW(Builder, BinOp, Ptr, Val, Ord, SingleThread); in CloneInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/bindings/ocaml/llvm/ |
| H A D | llvm_ocaml.c | 2038 LLVMValueRef Val, value Ord, value ST, in llvm_build_atomicrmw_native() argument
2042 Int_val(Ord), Bool_val(ST)); in llvm_build_atomicrmw_native()
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| H A D | llvm.ml | 166 | Ord Constructor
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| /netbsd-src/external/gpl2/gmake/dist/po/ |
| H A D | ga.po | 1936 msgstr "Ord� anaithnid insuite '%s'\n"
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/ |
| H A D | SemaChecking.cpp | 3386 auto Ord = ArgResult.Val.getInt().getZExtValue(); in CheckAMDGCNBuiltinFunctionCall() local
3390 if (!llvm::isValidAtomicOrderingCABI(Ord)) in CheckAMDGCNBuiltinFunctionCall()
3394 switch (static_cast<llvm::AtomicOrderingCABI>(Ord)) { in CheckAMDGCNBuiltinFunctionCall()
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