| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 162 cast<DefInit>(Op.MIOperandInfo->getArg(SubOpIdx))->getDef(); in EmitInstrDocs() 163 StringRef SubOpName = Op.MIOperandInfo->getArgNameStr(SubOpIdx); in EmitInstrDocs()
|
| H A D | CodeGenInstruction.h | 113 DagInit *MIOperandInfo; member 124 MIOperandInfo(MIOI) {} in OperandInfo()
|
| H A D | CodeGenInstruction.cpp | 216 DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo; in ParseOperandName() 745 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias() 764 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias()
|
| H A D | InstrInfoEmitter.cpp | 131 DagInit *MIOI = Op.MIOperandInfo; in GetOperandInfo() 390 const DagInit *MIOI = Op.MIOperandInfo; in emitOperandTypeMappings() 470 auto *MIOI = Op.MIOperandInfo; in emitLogicalOperandSizeMappings()
|
| H A D | FixedLenDecoderEmitter.cpp | 1967 CGI.Operands[SO.first].MIOperandInfo && in populateInstruction() 1968 CGI.Operands[SO.first].MIOperandInfo->getNumArgs()) { in populateInstruction() 1969 Init *Arg = CGI.Operands[SO.first].MIOperandInfo-> in populateInstruction() 2008 if (CGI.Operands[SO.first].MIOperandInfo && in populateInstruction() 2009 CGI.Operands[SO.first].MIOperandInfo->getNumArgs() > 1 && in populateInstruction()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCInstrFormats.td | 39 let MIOperandInfo = (ops i32imm, i32imm); 43 let MIOperandInfo = (ops GPR32:$B, immS<9>:$S9); 49 let MIOperandInfo = (ops GPR32:$B, i32imm:$LImm); 877 let MIOperandInfo = (ops i32imm, i32imm); 882 let MIOperandInfo = (ops i32imm); 887 let MIOperandInfo = (ops i32imm);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZOperands.td | 85 let MIOperandInfo = (ops !cast<Operand>(self)); 112 let MIOperandInfo = operands; 569 let MIOperandInfo = (ops brtarget16:$func, tlssym:$sym); 574 let MIOperandInfo = (ops brtarget32:$func, tlssym:$sym);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MicroMipsInstrInfo.td | 68 let MIOperandInfo = (ops ptr_gpr16mm_rc, simm4); 101 let MIOperandInfo = (ops ptr_sp_rc:$base, simm5:$offset); 109 let MIOperandInfo = (ops ptr_gp_rc:$base, simm7_lsl2:$offset); 117 let MIOperandInfo = (ops ptr_rc, simm9); 125 let MIOperandInfo = (ops GPR32, simm11); 133 let MIOperandInfo = (ops ptr_rc, simm12); 141 let MIOperandInfo = (ops ptr_rc, simm16); 158 let MIOperandInfo = (ops ptr_sp_rc, uimm8);
|
| H A D | MipsInstrInfo.td | 1124 let MIOperandInfo = (ops ptr_rc, simm16); 1135 let MIOperandInfo = (ops ptr_rc, simm10); 1144 let MIOperandInfo = (ops ptr_rc, simm9); 1152 let MIOperandInfo = (ops ptr_rc, !cast<Operand>("simm" # I)); 1158 let MIOperandInfo = (ops ptr_rc, !cast<Operand>("simm10_lsl" # I)); 1169 let MIOperandInfo = (ops ptr_rc, simm16); 1175 let MIOperandInfo = (ops ptr_rc);
|
| H A D | Mips16InstrInfo.td | 23 let MIOperandInfo = (ops CPU16Regs, simm16); 35 let MIOperandInfo = (ops CPU16RegsPlusSP, simm16); 41 let MIOperandInfo = (ops CPU16RegsPlusSP, simm16);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb.td | 191 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 204 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 220 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 228 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 236 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 248 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm); 260 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm); 272 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm); 286 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
|
| H A D | ARMInstrInfo.td | 705 let MIOperandInfo = (ops i32imm); 726 let MIOperandInfo = (ops i32imm); 753 let MIOperandInfo = (ops GPRnopc, GPRnopc, i32imm); 764 let MIOperandInfo = (ops GPR, i32imm); 775 let MIOperandInfo = (ops GPR, GPR, i32imm); 786 let MIOperandInfo = (ops GPR, i32imm); 1094 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 1115 let MIOperandInfo = (ops GPR:$base, GPRnopc:$offsreg, i32imm:$shift); 1127 let MIOperandInfo = (ops i32imm); 1139 let MIOperandInfo = (ops i32imm); [all …]
|
| H A D | ARMInstrThumb2.td | 63 let MIOperandInfo = (ops rGPR, i32imm); 178 let MIOperandInfo = (ops GPRnopc:$base); 188 let MIOperandInfo = (ops rGPR:$base); 199 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 231 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 245 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 258 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 284 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 308 let MIOperandInfo = (ops GPRnopc:$base, i32imm:$offsimm); 340 let MIOperandInfo = (ops GPRnopc:$base, i32imm:$offsimm); [all …]
|
| H A D | ARMInstrNEON.td | 98 let MIOperandInfo = (ops i32imm); 105 let MIOperandInfo = (ops i32imm); 112 let MIOperandInfo = (ops i32imm); 119 let MIOperandInfo = (ops i32imm); 264 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 274 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 284 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 295 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 305 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 315 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); [all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.td | 192 let MIOperandInfo = (ops GPR:$base, i32lo16s:$offset, AluOp:$Opcode); 204 let MIOperandInfo = (ops GPR:$Op1, GPR:$Op2, AluOp:$Opcode); 214 let MIOperandInfo = (ops i32lo21:$offset); 226 let MIOperandInfo = (ops GPR:$base, imm10:$offset, AluOp:$Opcode);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.td | 328 let MIOperandInfo = (ops ptr_rc, ptr_rc, i32imm); 333 let MIOperandInfo = (ops ptr_rc, i32imm, i32imm); 338 let MIOperandInfo = (ops i32imm /* = 0 */, ptr_rc, i32imm); 343 let MIOperandInfo = (ops i32imm /* = 0 */, i32imm, i32imm); 361 let MIOperandInfo = (ops ptr_rc, i32imm); 366 let MIOperandInfo = (ops i32imm /* = 0 */, i32imm); 373 let MIOperandInfo = (ops ptr_rc, i32imm); 378 let MIOperandInfo = (ops i32imm /* = 0 */, i32imm); 385 let MIOperandInfo = (ops ptr_rc, i32imm); 390 let MIOperandInfo = (ops i32imm /* = 0 */, i32imm);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.td | 80 let MIOperandInfo = (ops GR16, i16imm); 88 let MIOperandInfo = (ops GR16, i16imm); 101 let MIOperandInfo = (ops GR16); 113 let MIOperandInfo = (ops GR16);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.td | 179 let MIOperandInfo = (ops PTRDISPREGS, i16imm); 190 let MIOperandInfo = (ops GPRSP, i16imm); 260 let MIOperandInfo = (ops PTRREGS); 271 let MIOperandInfo = (ops PTRDISPREGS);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.td | 92 let MIOperandInfo = (ops i32imm:$imm); 959 let MIOperandInfo = (ops dispRI34:$imm, ptr_rc_nor0:$reg); 967 let MIOperandInfo = (ops dispRI34:$imm, immZero:$reg); 1032 let MIOperandInfo = (ops dispRI:$imm, ptr_rc_nor0:$reg); 1039 let MIOperandInfo = (ops ptr_rc_nor0:$ptrreg, ptr_rc_idx:$offreg); 1044 let MIOperandInfo = (ops dispRIX:$imm, ptr_rc_nor0:$reg); 1052 let MIOperandInfo = (ops dispRIHash:$imm, ptr_rc_nor0:$reg); 1059 let MIOperandInfo = (ops dispRIX16:$imm, ptr_rc_nor0:$reg); 1066 let MIOperandInfo = (ops dispSPE8:$imm, ptr_rc_nor0:$reg); 1073 let MIOperandInfo = (ops dispSPE4:$imm, ptr_rc_nor0:$reg); [all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | R600Instructions.td | 30 let MIOperandInfo = (ops R600_TReg32_X:$ptr, i32imm:$index); 35 let MIOperandInfo = (ops R600_Reg32:$ptr, R600_Reg32:$index); 74 let MIOperandInfo = (ops R600_Reg32:$ptr, i32imm:$index);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.td | 394 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, SEGMENT_REG); 403 let MIOperandInfo = (ops ptr_rc, i8imm, RC, i32imm, SEGMENT_REG); 454 let MIOperandInfo = (ops ptr_rc_norex, i8imm, ptr_rc_norex_nosp, i32imm, 469 let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, ptr_rc_tailcall, 480 let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, 601 let MIOperandInfo = (ops ptr_rc, SEGMENT_REG); 606 let MIOperandInfo = (ops ptr_rc); 621 let MIOperandInfo = (ops immOperand, SEGMENT_REG); 797 let MIOperandInfo = (ops GR64, i8imm, GR64_NOSP, i32imm, SEGMENT_REG); 804 let MIOperandInfo = (ops GR64, i8imm, GR64_NOSP, i32imm, SEGMENT_REG);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | Target.td | 827 dag MIOperandInfo = (ops); 943 /// instruction. OpTypes specifies the MIOperandInfo for the operand, and 948 let MIOperandInfo = OpTypes; 956 let MIOperandInfo = OpTypes;
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.td | 223 let MIOperandInfo = ops;
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.td | 141 let MIOperandInfo = (ops ptr_rc, ptr_rc); 146 let MIOperandInfo = (ops ptr_rc, i32imm);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.td | 80 let MIOperandInfo = (ops GPR, i16imm);
|