Searched refs:IsRet (Results 1 – 3 of 3) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 486 bool IsRet) const;
489 bool IsRet, CallLoweringInfo *CLI) const;
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| H A D | RISCVISelLowering.cpp | 6676 bool IsRet, Type *OrigTy, const RISCVTargetLowering &TLI, in CC_RISCV() argument
6684 if (!LocVT.isVector() && IsRet && ValNo > 1) in CC_RISCV()
6842 if (IsRet) in CC_RISCV()
6903 const SmallVectorImpl<ISD::InputArg> &Ins, bool IsRet) const { in analyzeInputArgs()
6916 if (IsRet) in analyzeInputArgs()
6923 ArgFlags, CCInfo, /*IsFixed=*/true, IsRet, ArgTy, *this, in analyzeInputArgs()
6934 const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsRet, in analyzeOutputArgs() argument
6949 ArgFlags, CCInfo, Outs[i].IsFixed, IsRet, OrigTy, *this, in analyzeOutputArgs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 2322 bit IsRet = isRet;
2494 let ColFields = ["IsRet"];
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