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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64GenRegisterBankInfo.def16 // 0: FPR 16-bit value.
18 // 1: FPR 32-bit value.
20 // 2: FPR 64-bit value.
22 // 3: FPR 128-bit value.
24 // 4: FPR 256-bit value.
26 // 5: FPR 512-bit value.
43 // 1: FPR 16-bit value. <-- This must match First3OpsIdx.
47 // 4: FPR 32-bit value. <-- This must match First3OpsIdx.
51 // 7: FPR 64-bit value.
55 // 10: FPR 128-bit value.
[all …]
H A DAArch64RegisterBanks.td16 def FPRRegBank : RegisterBank<"FPR", [QQQQ]>;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.cpp129 CHECK_VALUEMAP(FPR, 16); in AArch64RegisterBankInfo()
130 CHECK_VALUEMAP(FPR, 32); in AArch64RegisterBankInfo()
131 CHECK_VALUEMAP(FPR, 64); in AArch64RegisterBankInfo()
132 CHECK_VALUEMAP(FPR, 128); in AArch64RegisterBankInfo()
133 CHECK_VALUEMAP(FPR, 256); in AArch64RegisterBankInfo()
134 CHECK_VALUEMAP(FPR, 512); in AArch64RegisterBankInfo()
148 CHECK_VALUEMAP_3OPS(FPR, 32); in AArch64RegisterBankInfo()
149 CHECK_VALUEMAP_3OPS(FPR, 64); in AArch64RegisterBankInfo()
150 CHECK_VALUEMAP_3OPS(FPR, 128); in AArch64RegisterBankInfo()
151 CHECK_VALUEMAP_3OPS(FPR, 256); in AArch64RegisterBankInfo()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZMachineFunctionInfo.h73 void setVarArgsFirstFPR(Register FPR) { VarArgsFirstFPR = FPR; } in setVarArgsFirstFPR() argument
/netbsd-src/external/apache2/llvm/dist/llvm/docs/GlobalISel/
H A DGMIR.rst108 registers) and FPR (floating point registers).
111 has to happen in FPR and G_ADD has to happen in GPR. However, even though this
113 happen in both GPR and FPR, and which we want depends on who is going to consume
114 the loaded data. Similarly, G_FNEG can happen in both GPR and FPR. If we assign
115 it to FPR, then we'll use floating point negation. However, if we assign it to
126 AArch64 has three main banks. GPR for integer operations, FPR for floating
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.td50 class FPR<bits<16> Enc, string n> : MipsReg<Enc, n>;
156 def F#I : FPR<I, "f"#I>, DwarfRegNum<[!add(I, 32)]>;
160 def F_HI#I : FPR<I, "f"#I>, DwarfRegNum<[!add(I, 32)]>;
166 [!cast<FPR>("F"#!shl(I, 1)),
167 !cast<FPR>("F"#!add(!shl(I, 1), 1))]>;
171 def D#I#_64 : AFPR64<I, "f"#I, [!cast<FPR>("F"#I), !cast<FPR>("F_HI"#I)]>,
/netbsd-src/external/gpl3/binutils/dist/gas/config/
H A Dm68k-parse.y104 %token <reg> DR AR FPR FPCR LPC ZAR ZDR LZPC CREG
162 | FPR
659 | FPR
856 return FPR; in yylex()
H A Dm68k-parse.c180 FPR = 260, /* FPR */ enumerator
199 #define FPR 260 macro
2446 return FPR; in yylex()
/netbsd-src/external/gpl3/binutils.old/dist/gas/config/
H A Dm68k-parse.y104 %token <reg> DR AR FPR FPCR LPC ZAR ZDR LZPC CREG
162 | FPR
659 | FPR
856 return FPR; in yylex()
H A Dm68k-parse.c180 FPR = 260, /* FPR */ enumerator
199 #define FPR 260 macro
2446 return FPR; in yylex()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td56 // FPR - One of the 32 64-bit floating-point registers
57 class FPR<bits<5> num, string n> : PPCReg<n> {
78 class VSRL<FPR SubReg, string n> : PPCReg<n> {
141 def F#Index : FPR<Index, "f"#Index>,
161 def VSL#Index : VSRL<!cast<FPR>("F"#Index), "vs"#Index>,
162 DwarfRegAlias<!cast<FPR>("F"#Index)>;
/netbsd-src/sys/arch/sparc64/sparc64/
H A Demul.c53 #define FPR(l, i) ((int32_t) l->l_md.md_fpstate->fs_regs[i]) macro
102 *(int32_t *) val = FPR(l, i); in readfpreg()
/netbsd-src/sys/arch/sparc/sparc/
H A Demul.c52 #define FPR(l, i) ((int32_t) l->l_md.md_fpstate->fs_regs[i]) macro
101 *(int32_t *) val = FPR(l, i); in readfpreg()
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/frv/
H A Dpredicates.md79 ;; Return 1 if operand is a GPR register or a FPR register.
135 ;; Return 1 if operand is a GPR register, or a FPR register, or a 12
742 ;; Return true if operand is a FPR register.
764 ;; Return true if operand is an even GPR or FPR register.
896 ;; Return true if operand is a quad aligned FPR register.
927 ;; Return true if operand is an even FPR register.
958 ;; Return true if operand is an odd FPR register.
/netbsd-src/external/gpl3/gcc/dist/gcc/config/frv/
H A Dpredicates.md79 ;; Return 1 if operand is a GPR register or a FPR register.
135 ;; Return 1 if operand is a GPR register, or a FPR register, or a 12
742 ;; Return true if operand is a FPR register.
764 ;; Return true if operand is an even GPR or FPR register.
896 ;; Return true if operand is a quad aligned FPR register.
927 ;; Return true if operand is an even FPR register.
958 ;; Return true if operand is an odd FPR register.
/netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/
H A DSemaAttr.cpp1123 void Sema::setRoundingMode(SourceLocation Loc, llvm::RoundingMode FPR) { in setRoundingMode() argument
1126 if (FPR == llvm::RoundingMode::Dynamic && in setRoundingMode()
1129 FPR = llvm::RoundingMode::NearestTiesToEven; in setRoundingMode()
1132 NewFPFeatures.setRoundingModeOverride(FPR); in setRoundingMode()
/netbsd-src/external/gpl3/gcc/dist/gcc/config/rs6000/
H A Dconstraints.md33 "A floating point register (FPR), @code{f0}@dots{}@code{f31}.")
45 FPR (@code{vs0}@dots{}@code{vs31} are @code{f0}@dots{}@code{f31}) or a VR
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/rs6000/
H A Dconstraints.md33 "A floating point register (FPR), @code{f0}@dots{}@code{f31}.")
45 FPR (@code{vs0}@dots{}@code{vs31} are @code{f0}@dots{}@code{f31}) or a VR
/netbsd-src/external/gpl3/gcc/dist/gcc/config/s390/
H A Ds390-modes.def25 /* 128-bit float stored in a VR on z14+ or a FPR pair on older machines. */
28 /* 128-bit float stored in a FPR pair. */
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoD.td311 // Moves two GPRs to an FPR.
317 // Moves an FPR to two GPRs.
/netbsd-src/external/gpl3/gdb/dist/opcodes/po/
H A Dtr.po489 " fpr-names=ABI Print FPR names according to specified ABI.\n"
493 " fpr-names=ABI Belirtilen ABI'ye göre FPR isimlerini gösterir.\n"
522 " reg-names=ABI Print GPR and FPR names according to\n"
526 " reg-names=ABI Belirtilen ABI'ye göre GPR ve FPR isimlerini\n"
/netbsd-src/external/gpl3/binutils/dist/opcodes/po/
H A Dtr.po489 " fpr-names=ABI Print FPR names according to specified ABI.\n"
493 " fpr-names=ABI Belirtilen ABI'ye göre FPR isimlerini gösterir.\n"
522 " reg-names=ABI Print GPR and FPR names according to\n"
526 " reg-names=ABI Belirtilen ABI'ye göre GPR ve FPR isimlerini\n"
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/po/
H A Dtr.po489 " fpr-names=ABI Print FPR names according to specified ABI.\n"
493 " fpr-names=ABI Belirtilen ABI'ye göre FPR isimlerini gösterir.\n"
522 " reg-names=ABI Print GPR and FPR names according to\n"
526 " reg-names=ABI Belirtilen ABI'ye göre GPR ve FPR isimlerini\n"
/netbsd-src/external/gpl3/gdb.old/dist/opcodes/po/
H A Dtr.po489 " fpr-names=ABI Print FPR names according to specified ABI.\n"
493 " fpr-names=ABI Belirtilen ABI'ye göre FPR isimlerini gösterir.\n"
522 " reg-names=ABI Print GPR and FPR names according to\n"
526 " reg-names=ABI Belirtilen ABI'ye göre GPR ve FPR isimlerini\n"
/netbsd-src/external/gpl3/binutils.old/dist/gas/doc/
H A Dc-riscv.texi408 @item rd @tab Destination register number for operand x, can be GPR or FPR.
411 @item rs1 @tab First source register number for operand x, can be GPR or FPR.
414 @item rs2 @tab Second source register number for operand x, can be GPR or FPR.

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