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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrConv.td58 defm I32_TRUNC_S_SAT_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
59 [(set I32:$dst, (fp_to_sint F32:$src))],
63 defm I32_TRUNC_U_SAT_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
64 [(set I32:$dst, (fp_to_uint F32:$src))],
68 defm I64_TRUNC_S_SAT_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
69 [(set I64:$dst, (fp_to_sint F32:$src))],
73 defm I64_TRUNC_U_SAT_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
74 [(set I64:$dst, (fp_to_uint F32:$src))],
100 def : Pat<(fp_to_sint_sat F32:$src, i32), (I32_TRUNC_S_SAT_F32 F32:$src)>;
101 def : Pat<(fp_to_uint_sat F32:$src, i32), (I32_TRUNC_U_SAT_F32 F32:$src)>;
[all …]
H A DWebAssemblyInstrFloat.td16 defm _F32 : I<(outs F32:$dst), (ins F32:$src), (outs), (ins),
17 [(set F32:$dst, (node F32:$src))],
27 defm _F32 : I<(outs F32:$dst), (ins F32:$lhs, F32:$rhs), (outs), (ins),
28 [(set F32:$dst, (node F32:$lhs, F32:$rhs))],
37 defm _F32 : I<(outs I32:$dst), (ins F32:$lhs, F32:$rhs), (outs), (ins),
38 [(set I32:$dst, (setcc F32:$lhs, F32:$rhs, cond))],
70 def : Pat<(fcopysign F64:$lhs, F32:$rhs),
71 (COPYSIGN_F64 F64:$lhs, (F64_PROMOTE_F32 F32:$rhs))>;
72 def : Pat<(fcopysign F32:$lhs, F64:$rhs),
73 (COPYSIGN_F32 F32:$lhs, (F32_DEMOTE_F64 F64:$rhs))>;
[all …]
H A DWebAssemblyRuntimeLibcallSignatures.cpp531 Rets.push_back(wasm::ValType::F32); in getLibcallSignature()
532 Params.push_back(wasm::ValType::F32); in getLibcallSignature()
535 Rets.push_back(wasm::ValType::F32); in getLibcallSignature()
539 Rets.push_back(wasm::ValType::F32); in getLibcallSignature()
543 Rets.push_back(wasm::ValType::F32); in getLibcallSignature()
547 Rets.push_back(wasm::ValType::F32); in getLibcallSignature()
552 Params.push_back(wasm::ValType::F32); in getLibcallSignature()
568 Params.push_back(wasm::ValType::F32); in getLibcallSignature()
580 Params.push_back(wasm::ValType::F32); in getLibcallSignature()
591 Rets.push_back(wasm::ValType::F32); in getLibcallSignature()
[all …]
H A DWebAssemblyFastISel.cpp1096 bool F32 = getSimpleType(FCmp->getOperand(0)->getType()) != MVT::f64; in selectFCmp() local
1101 Opc = F32 ? WebAssembly::EQ_F32 : WebAssembly::EQ_F64; in selectFCmp()
1104 Opc = F32 ? WebAssembly::NE_F32 : WebAssembly::NE_F64; in selectFCmp()
1107 Opc = F32 ? WebAssembly::GT_F32 : WebAssembly::GT_F64; in selectFCmp()
1110 Opc = F32 ? WebAssembly::GE_F32 : WebAssembly::GE_F64; in selectFCmp()
1113 Opc = F32 ? WebAssembly::LT_F32 : WebAssembly::LT_F64; in selectFCmp()
1116 Opc = F32 ? WebAssembly::LE_F32 : WebAssembly::LE_F64; in selectFCmp()
1119 Opc = F32 ? WebAssembly::LE_F32 : WebAssembly::LE_F64; in selectFCmp()
1123 Opc = F32 ? WebAssembly::LT_F32 : WebAssembly::LT_F64; in selectFCmp()
1127 Opc = F32 ? WebAssembly::GE_F32 : WebAssembly::GE_F64; in selectFCmp()
[all …]
H A DWebAssemblyInstrInfo.td261 defm "": ARGUMENT<F32, f32>;
339 defm "" : LOCAL<F32, global_op32>;
354 defm CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm),
356 [(set F32:$res, fpimm:$imm)],
H A DWebAssemblyRegisterInfo.td64 def F32 : WebAssemblyRegClass<[f32], 32, (add F32_0)>;
H A DWebAssemblyMCInstLower.cpp216 return wasm::ValType::F32; in getType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/Utils/
H A DWebAssemblyTypeUtilities.cpp27 return wasm::ValType::F32; in parseType()
52 .Case("f32", WebAssembly::BlockType::F32) in parseBlockType()
134 return wasm::ValType::F32; in toValType()
H A DWebAssemblyTypeUtilities.h31 F32 = unsigned(wasm::ValType::F32), enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonPatterns.td440 def: OpR_R_pat<F2_conv_sf2df, pf1<fpextend>, f64, F32>;
453 def: OpR_R_pat<F2_conv_sf2w_chop, pf1<fp_to_sint>, i32, F32>;
455 def: OpR_R_pat<F2_conv_sf2d_chop, pf1<fp_to_sint>, i64, F32>;
458 def: OpR_R_pat<F2_conv_sf2uw_chop, pf1<fp_to_uint>, i32, F32>;
460 def: OpR_R_pat<F2_conv_sf2ud_chop, pf1<fp_to_uint>, i64, F32>;
464 def: Pat<(i32 (bitconvert F32:$v)), (I32:$v)>;
465 def: Pat<(f32 (bitconvert I32:$v)), (F32:$v)>;
682 def: OpR_RR_pat<F2_sfcmpeq, seteq, i1, F32>;
683 def: OpR_RR_pat<F2_sfcmpgt, setgt, i1, F32>;
684 def: OpR_RR_pat<F2_sfcmpge, setge, i1, F32>;
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEInstrVec.td453 defm VBRDU : VBRDm<"vbrdu", 0x8c, V64, F32, VM>;
973 let cx = 1, cx2 = 0 in defm PVANDUP : RVLm<"pvand.up", 0xc4, F32, V64, VM>;
979 let cx = 1, cx2 = 0 in defm PVORUP : RVLm<"pvor.up", 0xc5, F32, V64, VM>;
985 let cx = 1, cx2 = 0 in defm PVXORUP : RVLm<"pvxor.up", 0xc6, F32, V64, VM>;
991 let cx = 1, cx2 = 0 in defm PVEQVUP : RVLm<"pveqv.up", 0xc7, F32, V64, VM>;
1025 let cx = 1, cx2 = 0 in defm PVSLLUP : RVSm<"pvsll.up", 0xe5, F32, V64, VM>;
1034 let cx = 1, cx2 = 0 in defm PVSRLUP : RVSm<"pvsrl.up", 0xf5, F32, V64, VM>;
1046 let cx = 1, cx2 = 0 in defm PVSLAUP : RVSm<"pvsla.up", 0xe6, F32, V64, VM>;
1062 let cx = 1, cx2 = 0 in defm PVSRAUP : RVSm<"pvsra.up", 0xf6, F32, V64, VM>;
1085 defm PVFADDUP : RVm<"pvfadd.up", 0xcc, V64, F32, VM, simm7fp>;
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H A DVEInstrInfo.td1015 defm LDU : LOADm<"ldu", 0x02, F32, f32, load>;
1073 defm STU : STOREm<"stu", 0x12, F32, f32, store>;
1100 defm DLDU : LOADm<"dldu", 0x0a, F32, f32, load>;
1303 let cw = 1, cw2 = 1 in defm CMOVS : RRCMOVm<"cmov.s.${cfw}", 0x3B, F32, f32>;
1359 defm FADDS : RRFm<"fadd.s", 0x4C, F32, f32, fadd, simm7fp, mimmfp32>;
1364 defm FSUBS : RRFm<"fsub.s", 0x5C, F32, f32, fsub, simm7fp, mimmfp32>;
1369 defm FMULS : RRFm<"fmul.s", 0x4D, F32, f32, fmul, simm7fp, mimmfp32>;
1374 defm FDIVS : RRFm<"fdiv.s", 0x5D, F32, f32, fdiv, simm7fp, mimmfp32>;
1379 defm FCMPS : RRFm<"fcmp.s", 0x7E, F32, f32, null_frag, simm7fp, mimmfp32>;
1386 defm FMAXS : RRFm<"fmax.s", 0x3E, F32, f32, fmaxnum, simm7fp, mimmfp32>;
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPULibCalls.cpp697 if ((getArgType(FInfo) == AMDGPULibFunc::F32 || in fold()
748 if (getArgType(FInfo) == AMDGPULibFunc::F32) { in TDOFold()
782 if (getArgType(FInfo) != AMDGPULibFunc::F32 || in replaceWithNative()
828 (CF1 && (getArgType(FInfo) == AMDGPULibFunc::F32))) in fold_divide()
948 double dval = (getArgType(FInfo) == AMDGPULibFunc::F32) in fold_pow()
1011 double V = (getArgType(FInfo) == AMDGPULibFunc::F32) in fold_pow()
1036 double V = (getArgType(FInfo) == AMDGPULibFunc::F32) in fold_pow()
1043 if (getArgType(FInfo) == AMDGPULibFunc::F32) { in fold_pow()
1062 double y = (getArgType(FInfo) == AMDGPULibFunc::F32) in fold_pow()
1072 double y = (getArgType(FInfo) == AMDGPULibFunc::F32) in fold_pow()
[all …]
H A DSISchedule.td32 // Conversion to or from F32 (but not converting F64 to or from F32)
34 // F16 or F32 transcendental instructions (these are quarter rate)
H A DAMDGPULibFunc.cpp386 P.ArgType = AMDGPULibFunc::F32; P.VectorSize = 4; break; in getNextParam()
627 case 'f': res.ArgType = AMDGPULibFunc::F32; break; in parseItaniumParam()
734 case AMDGPULibFunc::F32: return "f"; in getItaniumTypeName()
883 case AMDGPULibFunc::F32: T = Type::getFloatTy(C); break; in getIntrinsicParamType()
H A DAMDGPULibFunc.h271 F32 = FLOAT | B32, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Demangle/
H A DRustDemangle.h46 F32, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Demangle/
H A DRustDemangle.cpp291 Type = BasicType::F32; in parseBasicType()
387 case BasicType::F32: in printBasicType()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/
H A DAMDGPUMetadata.h104 F32 = 8, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/BinaryFormat/
H A DWasm.h395 F32 = WASM_TYPE_F32, enumerator
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/
H A Dthunderx3t110.md220 ; latency 16 throughput 16/4: FDIV F32
440 ; model that pipeline is occupied the whole time D/F32, Q/F32: 16/4
/netbsd-src/external/gpl3/gcc/dist/gcc/config/aarch64/
H A Dthunderx3t110.md220 ; latency 16 throughput 16/4: FDIV F32
440 ; model that pipeline is occupied the whole time D/F32, Q/F32: 16/4
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64SchedA57.td463 // ASIMD FP divide, D-form, F32
465 // ASIMD FP divide, Q-form, F32
471 // ASIMD FP square root, D-form, F32
473 // ASIMD FP square root, Q-form, F32
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.td250 def D16 : SparcReg< 1, "F32">;
276 def Q8 : Rq< 1, "F32", [D16, D17]>;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Support/
H A DAMDGPUMetadata.cpp84 YIO.enumCase(EN, "F32", ValueType::F32); in enumeration()

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