| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 730 setIndexedLoadAction(IM, VT, Expand); in initActions()
731 setIndexedStoreAction(IM, VT, Expand); in initActions()
732 setIndexedMaskedLoadAction(IM, VT, Expand); in initActions()
733 setIndexedMaskedStoreAction(IM, VT, Expand); in initActions()
737 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Expand); in initActions()
740 setOperationAction(ISD::FGETSIGN, VT, Expand); in initActions()
741 setOperationAction(ISD::CONCAT_VECTORS, VT, Expand); in initActions()
742 setOperationAction(ISD::FMINNUM, VT, Expand); in initActions()
743 setOperationAction(ISD::FMAXNUM, VT, Expand); in initActions()
744 setOperationAction(ISD::FMINNUM_IEEE, VT, Expand); in initActions()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 71 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in BPFTargetLowering()
72 setOperationAction(ISD::BRIND, MVT::Other, Expand); in BPFTargetLowering()
73 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in BPFTargetLowering()
78 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in BPFTargetLowering()
79 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in BPFTargetLowering()
103 setOperationAction(ISD::SDIVREM, VT, Expand); in BPFTargetLowering()
104 setOperationAction(ISD::UDIVREM, VT, Expand); in BPFTargetLowering()
105 setOperationAction(ISD::SREM, VT, Expand); in BPFTargetLowering()
106 setOperationAction(ISD::UREM, VT, Expand); in BPFTargetLowering()
107 setOperationAction(ISD::MULHU, VT, Expand); in BPFTargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 123 setLoadExtAction(ISD::EXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
124 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
125 setLoadExtAction(ISD::ZEXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
135 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
140 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
145 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
149 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
150 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
151 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
152 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand); in AMDGPUTargetLowering()
[all …]
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| H A D | R600ISelLowering.cpp | 65 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
66 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
67 setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
69 setLoadExtAction(ISD::EXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
70 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
71 setLoadExtAction(ISD::ZEXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
94 setTruncStoreAction(MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
95 setTruncStoreAction(MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
98 setCondCodeAction(ISD::SETO, MVT::f32, Expand); in R600TargetLowering()
99 setCondCodeAction(ISD::SETUO, MVT::f32, Expand); in R600TargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1438 setOperationAction(Op, MVT::v2i32, Expand); in SparcTargetLowering()
1442 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Expand); in SparcTargetLowering()
1443 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i32, Expand); in SparcTargetLowering()
1444 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i32, Expand); in SparcTargetLowering()
1446 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, VT, Expand); in SparcTargetLowering()
1447 setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i32, VT, Expand); in SparcTargetLowering()
1448 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, VT, Expand); in SparcTargetLowering()
1450 setTruncStoreAction(VT, MVT::v2i32, Expand); in SparcTargetLowering()
1451 setTruncStoreAction(MVT::v2i32, VT, Expand); in SparcTargetLowering()
1470 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand); in SparcTargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 54 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in AVRTargetLowering()
55 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in AVRTargetLowering()
56 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i8, Expand); in AVRTargetLowering()
57 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i16, Expand); in AVRTargetLowering()
62 setLoadExtAction(N, VT, MVT::i8, Expand); in AVRTargetLowering()
66 setTruncStoreAction(MVT::i16, MVT::i8, Expand); in AVRTargetLowering()
88 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand); in AVRTargetLowering()
89 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand); in AVRTargetLowering()
90 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand); in AVRTargetLowering()
93 setOperationAction(ISD::ROTL, MVT::i16, Expand); in AVRTargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.cpp | 130 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); in Mips16TargetLowering()
131 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
132 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
133 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
134 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand); in Mips16TargetLowering()
135 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in Mips16TargetLowering()
136 setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i32, Expand); in Mips16TargetLowering()
137 setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i32, Expand); in Mips16TargetLowering()
138 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); in Mips16TargetLowering()
139 setOperationAction(ISD::ATOMIC_LOAD_MIN, MVT::i32, Expand); in Mips16TargetLowering()
[all …]
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| H A D | MipsISelLowering.cpp | 321 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); in MipsTargetLowering()
322 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand); in MipsTargetLowering()
329 setLoadExtAction(ISD::EXTLOAD, VT, F16VT, Expand); in MipsTargetLowering()
332 setTruncStoreAction(MVT::f32, MVT::f16, Expand); in MipsTargetLowering()
333 setTruncStoreAction(MVT::f64, MVT::f16, Expand); in MipsTargetLowering()
335 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in MipsTargetLowering()
344 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in MipsTargetLowering()
390 setOperationAction(ISD::SDIV, MVT::i32, Expand); in MipsTargetLowering()
391 setOperationAction(ISD::SREM, MVT::i32, Expand); in MipsTargetLowering()
392 setOperationAction(ISD::UDIV, MVT::i32, Expand); in MipsTargetLowering()
[all …]
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| H A D | MipsSEISelLowering.cpp | 77 setTruncStoreAction(VT0, VT1, Expand); in MipsSETargetLowering()
78 setLoadExtAction(ISD::SEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
79 setLoadExtAction(ISD::ZEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
80 setLoadExtAction(ISD::EXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
93 setOperationAction(Opc, VecTys[i], Expand); in MipsSETargetLowering()
230 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in MipsSETargetLowering()
231 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in MipsSETargetLowering()
238 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
239 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
249 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in MipsSETargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 68 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in MSP430TargetLowering()
69 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in MSP430TargetLowering()
73 setTruncStoreAction(MVT::i16, MVT::i8, Expand); in MSP430TargetLowering()
81 setOperationAction(ISD::ROTL, MVT::i8, Expand); in MSP430TargetLowering()
82 setOperationAction(ISD::ROTR, MVT::i8, Expand); in MSP430TargetLowering()
83 setOperationAction(ISD::ROTL, MVT::i16, Expand); in MSP430TargetLowering()
84 setOperationAction(ISD::ROTR, MVT::i16, Expand); in MSP430TargetLowering()
88 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in MSP430TargetLowering()
91 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in MSP430TargetLowering()
94 setOperationAction(ISD::SELECT, MVT::i8, Expand); in MSP430TargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 104 setTruncStoreAction(VT, MVT::i1, Expand); in initSPUActions()
110 setLoadExtAction(ISD::EXTLOAD, FPVT, OtherFPVT, Expand); in initSPUActions()
111 setTruncStoreAction(FPVT, OtherFPVT, Expand); in initSPUActions()
134 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in initSPUActions()
135 setOperationAction(ISD::VAEND, MVT::Other, Expand); in initSPUActions()
143 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in initSPUActions()
144 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in initSPUActions()
150 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in initSPUActions()
153 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in initSPUActions()
160 setOperationAction(ISD::UREM, IntVT, Expand); in initSPUActions()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 86 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in LanaiTargetLowering()
87 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in LanaiTargetLowering()
89 setOperationAction(ISD::SELECT, MVT::i32, Expand); in LanaiTargetLowering()
98 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in LanaiTargetLowering()
99 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in LanaiTargetLowering()
102 setOperationAction(ISD::VAARG, MVT::Other, Expand); in LanaiTargetLowering()
103 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in LanaiTargetLowering()
104 setOperationAction(ISD::VAEND, MVT::Other, Expand); in LanaiTargetLowering()
106 setOperationAction(ISD::SDIV, MVT::i32, Expand); in LanaiTargetLowering()
107 setOperationAction(ISD::UDIV, MVT::i32, Expand); in LanaiTargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 97 void Expand(SDNode *Node, SmallVectorImpl<SDValue> &Results);
279 case TargetLowering::Expand: { in LegalizeOp()
310 case TargetLowering::Expand: { in LegalizeOp()
337 Action = TargetLowering::Expand; in LegalizeOp()
352 if (Action == TargetLowering::Expand && !TLI.isStrictFPEnabled() && in LegalizeOp()
357 == TargetLowering::Expand && in LegalizeOp()
527 case TargetLowering::Expand: in LegalizeOp()
529 Expand(Node, ResultVals); in LegalizeOp()
732 void VectorLegalizer::Expand(SDNode *Node, SmallVectorImpl<SDValue> &Results) { in Expand() function in VectorLegalizer
931 if (TLI.getOperationAction(ISD::AND, VT) == TargetLowering::Expand || in ExpandSELECT()
[all …]
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| /netbsd-src/external/gpl2/rcs/dist/src/ |
| H A D | co.c | 352 int newmode = Expand==BINARY_EXPAND ? OPEN_O_BINARY : 0;
432 Expand = expmode;
433 if (0 < lockflag && Expand == VAL_EXPAND) {
457 Expand < MIN_UNEXPAND
485 if (Expand == BINARY_EXPAND)
493 ! (Expand==VAL_EXPAND || (lockflag<=0 && StrictLocks))
|
| H A D | rcsclean.c | 196 Expand = expmode;
199 Expand == KEYVAL_EXPAND &&
202 Expand = KEYVALLOCK_EXPAND;
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 322 setOperationAction(ISD::UREM, VT, Expand); in AArch64TargetLowering()
323 setOperationAction(ISD::SREM, VT, Expand); in AArch64TargetLowering()
324 setOperationAction(ISD::SDIVREM, VT, Expand); in AArch64TargetLowering()
325 setOperationAction(ISD::UDIVREM, VT, Expand); in AArch64TargetLowering()
336 setCondCodeAction(ISD::SETO, VT, Expand); in AArch64TargetLowering()
337 setCondCodeAction(ISD::SETOLT, VT, Expand); in AArch64TargetLowering()
338 setCondCodeAction(ISD::SETLT, VT, Expand); in AArch64TargetLowering()
339 setCondCodeAction(ISD::SETOLE, VT, Expand); in AArch64TargetLowering()
340 setCondCodeAction(ISD::SETLE, VT, Expand); in AArch64TargetLowering()
341 setCondCodeAction(ISD::SETULT, VT, Expand); in AArch64TargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 176 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in PPCTargetLowering()
186 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand); in PPCTargetLowering()
187 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); in PPCTargetLowering()
188 setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand); in PPCTargetLowering()
189 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); in PPCTargetLowering()
190 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand); in PPCTargetLowering()
191 setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand); in PPCTargetLowering()
192 setTruncStoreAction(MVT::f64, MVT::f16, Expand); in PPCTargetLowering()
193 setTruncStoreAction(MVT::f32, MVT::f16, Expand); in PPCTargetLowering()
196 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in PPCTargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 96 setOperationAction(ISD::VAARG, MVT::Other, Expand); in WebAssemblyTargetLowering()
97 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in WebAssemblyTargetLowering()
98 setOperationAction(ISD::VAEND, MVT::Other, Expand); in WebAssemblyTargetLowering()
106 setCondCodeAction(CC, T, Expand); in WebAssemblyTargetLowering()
110 setOperationAction(Op, T, Expand); in WebAssemblyTargetLowering()
120 setOperationAction(ISD::FP16_TO_FP, T, Expand); in WebAssemblyTargetLowering()
121 setOperationAction(ISD::FP_TO_FP16, T, Expand); in WebAssemblyTargetLowering()
122 setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand); in WebAssemblyTargetLowering()
123 setTruncStoreAction(T, MVT::f16, Expand); in WebAssemblyTargetLowering()
132 setOperationAction(Op, T, Expand); in WebAssemblyTargetLowering()
[all …]
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| /netbsd-src/external/gpl2/rcs/include/ |
| H A D | conf.h | 80 # define FOPEN_R_WORK (Expand==BINARY_EXPAND ? "r" : "rb")
82 # define FOPEN_W_WORK (Expand==BINARY_EXPAND ? "w" : "wb")
83 # define FOPEN_WPLUS_WORK (Expand==BINARY_EXPAND ? "w+" : "w+b")
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 374 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f16, Expand); in NVPTXTargetLowering()
375 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f16, Expand); in NVPTXTargetLowering()
378 setFP16OperationAction(ISD::SETCC, MVT::v2f16, Legal, Expand); in NVPTXTargetLowering()
383 setOperationAction(ISD::SELECT_CC, VT, Expand); in NVPTXTargetLowering()
384 setOperationAction(ISD::BR_CC, VT, Expand); in NVPTXTargetLowering()
393 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); in NVPTXTargetLowering()
413 setOperationAction(ISD::ROTL, MVT::i16, Expand); in NVPTXTargetLowering()
414 setOperationAction(ISD::ROTR, MVT::i16, Expand); in NVPTXTargetLowering()
415 setOperationAction(ISD::ROTL, MVT::i8, Expand); in NVPTXTargetLowering()
416 setOperationAction(ISD::ROTR, MVT::i8, Expand); in NVPTXTargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1501 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); in HexagonTargetLowering()
1502 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); in HexagonTargetLowering()
1526 setOperationAction(ISD::VAEND, MVT::Other, Expand); in HexagonTargetLowering()
1527 setOperationAction(ISD::VAARG, MVT::Other, Expand); in HexagonTargetLowering()
1531 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in HexagonTargetLowering()
1533 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in HexagonTargetLowering()
1534 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in HexagonTargetLowering()
1541 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in HexagonTargetLowering()
1554 setOperationAction(ISD::SADDO, VT, Expand); in HexagonTargetLowering()
1555 setOperationAction(ISD::SSUBO, VT, Expand); in HexagonTargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 178 setOperationAction(ISD::SINT_TO_FP, VT, Expand); in addTypeForNEON()
179 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in addTypeForNEON()
180 setOperationAction(ISD::FP_TO_SINT, VT, Expand); in addTypeForNEON()
181 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addTypeForNEON()
187 setOperationAction(ISD::SELECT, VT, Expand); in addTypeForNEON()
188 setOperationAction(ISD::SELECT_CC, VT, Expand); in addTypeForNEON()
189 setOperationAction(ISD::VSELECT, VT, Expand); in addTypeForNEON()
190 setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Expand); in addTypeForNEON()
208 setOperationAction(ISD::SDIV, VT, Expand); in addTypeForNEON()
209 setOperationAction(ISD::UDIV, VT, Expand); in addTypeForNEON()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 170 setOperationAction(ISD::DYNAMIC_STACKALLOC, XLenVT, Expand); in RISCVTargetLowering()
172 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in RISCVTargetLowering()
173 setOperationAction(ISD::BR_CC, XLenVT, Expand); in RISCVTargetLowering()
175 setOperationAction(ISD::SELECT_CC, XLenVT, Expand); in RISCVTargetLowering()
177 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in RISCVTargetLowering()
178 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in RISCVTargetLowering()
181 setOperationAction(ISD::VAARG, MVT::Other, Expand); in RISCVTargetLowering()
182 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in RISCVTargetLowering()
183 setOperationAction(ISD::VAEND, MVT::Other, Expand); in RISCVTargetLowering()
185 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); in RISCVTargetLowering()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 89 setOperationAction(Opc, MVT::i32, Expand); in ARCTargetLowering()
117 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in ARCTargetLowering()
118 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in ARCTargetLowering()
128 setOperationAction(ISD::VAEND, MVT::Other, Expand); in ARCTargetLowering()
129 setOperationAction(ISD::VAARG, MVT::Other, Expand); in ARCTargetLowering()
130 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in ARCTargetLowering()
133 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in ARCTargetLowering()
134 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in ARCTargetLowering()
|
| /netbsd-src/external/gpl3/gdb.old/dist/sim/ppc/ |
| H A D | dc-complex | 22 ## Branch Conditional instruction - Expand BO{0:4}
26 ## Expand RA on equality with 0 in Add instructions were if(RA==0) appears.
|