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Searched refs:ElemVT (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp106 EVT ElemVT = NOutVT; in ExpandRes_BITCAST() local
107 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST()
111 unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2; in ExpandRes_BITCAST()
116 ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits); in ExpandRes_BITCAST()
117 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST()
125 Vals.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, in ExpandRes_BITCAST()
H A DLegalizeVectorTypes.cpp5068 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE() local
5073 SDValue NeutralElem = DAG.getNeutralElement(BaseOpc, dl, ElemVT, Flags); in WidenVecOp_VECREDUCE()
5094 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE_SEQ() local
5099 SDValue NeutralElem = DAG.getNeutralElement(BaseOpc, dl, ElemVT, Flags); in WidenVecOp_VECREDUCE_SEQ()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h634 SDValue combineExtract(const SDLoc &DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.cpp1644 MVT ElemVT = Op.getSimpleValueType().getVectorElementType(); in lowerBUILD_VECTOR() local
1659 MVT LegalResVT = MVT::getVectorVT(ElemVT, 256); in lowerBUILD_VECTOR()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp8514 EVT ElemVT = VT.getVectorElementType(); in allowsMisalignedMemoryAccesses() local
8515 if (Alignment >= ElemVT.getStoreSize()) { in allowsMisalignedMemoryAccesses()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp9175 EVT ElemVT = VT.getScalarType(); in LowerSPLAT_VECTOR() local
9183 switch (ElemVT.getSimpleVT().SimpleTy) { in LowerSPLAT_VECTOR()