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Searched refs:EXTLOAD (Results 1 – 25 of 42) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp123 setLoadExtAction(ISD::EXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
142 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in AMDGPUTargetLowering()
143 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Legal); in AMDGPUTargetLowering()
144 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Legal); in AMDGPUTargetLowering()
145 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
149 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
152 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand); in AMDGPUTargetLowering()
155 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i16, Expand); in AMDGPUTargetLowering()
158 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v3i16, Expand); in AMDGPUTargetLowering()
161 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i16, Expand); in AMDGPUTargetLowering()
[all …]
H A DR600ISelLowering.cpp59 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in R600TargetLowering()
60 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Custom); in R600TargetLowering()
61 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Custom); in R600TargetLowering()
65 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
69 setLoadExtAction(ISD::EXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
1417 ISD::EXTLOAD, DL, VT, Chain, Ptr, LoadNode->getPointerInfo(), MemVT, in LowerLOAD()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp694 case ISD::EXTLOAD: OS << ", anyext"; break; in print_details()
726 case ISD::EXTLOAD: OS << ", anyext"; break; in print_details()
763 case ISD::EXTLOAD: OS << ", anyext"; break; in print_details()
H A DLegalizeDAG.cpp316 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
331 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
749 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; in LegalizeLoadOps()
877 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
921 assert(ExtType != ISD::EXTLOAD && in LegalizeLoadOps()
925 SDValue Result = DAG.getExtLoad(ISD::EXTLOAD, dl, in LegalizeLoadOps()
1379 NewLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, Op.getValueType(), Ch, StackPtr, in ExpandExtractFromVectorThroughStack()
1529 State.IntValue = DAG.getExtLoad(ISD::EXTLOAD, DL, LoadTy, State.Chain, IntPtr, in getSignAsIntValue()
1706 !TLI.isLoadExtLegalOrCustom(ISD::EXTLOAD, DestVT, SlotVT))) in EmitStackConvert()
1737 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT, in EmitStackConvert()
[all …]
H A DDAGCombiner.cpp1213 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) ? ISD::EXTLOAD in PromoteOperand()
1450 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) ? ISD::EXTLOAD in PromoteLoad()
5613 if (MLoad && BVec && MLoad->getExtensionType() == ISD::EXTLOAD && in visitAND()
5768 case ISD::EXTLOAD: B = CanZextLoadProfitably; break; in visitAND()
5781 if (Load->getExtensionType() == ISD::EXTLOAD) { in visitAND()
10187 if (LoadExt == ISD::NON_EXTLOAD || LoadExt == ISD::EXTLOAD) in isCompatibleLoad()
10225 auto ExtLoadOpcode = ISD::EXTLOAD; in tryToFoldExtendSelectLoad()
11406 TLI.isLoadExtLegal(ISD::EXTLOAD, VT, N0.getValueType())) { in visitANY_EXTEND()
11414 SDValue ExtLoad = DAG.getExtLoad(ISD::EXTLOAD, SDLoc(N), VT, in visitANY_EXTEND()
14678 TLI.isLoadExtLegal(ISD::EXTLOAD, VT, N0.getValueType())) { in visitFP_EXTEND()
[all …]
H A DLegalizeIntegerTypes.cpp686 ISD::isNON_EXTLoad(N) ? ISD::EXTLOAD : N->getExtensionType(); in PromoteIntRes_LOAD()
705 N->getAddressingMode(), ISD::EXTLOAD); in PromoteIntRes_MLOAD()
720 ExtType = ISD::EXTLOAD; in PromoteIntRes_MGATHER()
3210 assert(ExtType == ISD::EXTLOAD && "Unknown extload!"); in ExpandIntRes_LOAD()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1321 enum LoadExtType { NON_EXTLOAD = 0, EXTLOAD, SEXTLOAD, ZEXTLOAD }; enumerator
H A DSelectionDAGNodes.h2681 cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp434 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); in NVPTXTargetLowering()
435 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand); in NVPTXTargetLowering()
436 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in NVPTXTargetLowering()
437 setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, MVT::v2f16, Expand); in NVPTXTargetLowering()
438 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f16, Expand); in NVPTXTargetLowering()
439 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f32, Expand); in NVPTXTargetLowering()
440 setLoadExtAction(ISD::EXTLOAD, MVT::v4f32, MVT::v4f16, Expand); in NVPTXTargetLowering()
441 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f16, Expand); in NVPTXTargetLowering()
442 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f32, Expand); in NVPTXTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp122 setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand); in WebAssemblyTargetLowering()
264 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in WebAssemblyTargetLowering()
267 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
275 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
281 for (auto Ext : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) { in WebAssemblyTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp124 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in XCoreTargetLowering()
452 DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, HighAddr, in LowerLOAD()
954 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD()
960 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kInstrInfo.td494 if (ExtType == ISD::EXTLOAD)
504 if (ExtType == ISD::EXTLOAD)
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1603 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); in HexagonTargetLowering()
1609 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); in HexagonTargetLowering()
1661 setLoadExtAction(ISD::EXTLOAD, TargetVT, VT, Expand); in HexagonTargetLowering()
1680 setLoadExtAction(ISD::EXTLOAD, MVT::v2i16, MVT::v2i8, Legal); in HexagonTargetLowering()
1683 setLoadExtAction(ISD::EXTLOAD, MVT::v4i16, MVT::v4i8, Legal); in HexagonTargetLowering()
H A DHexagonISelDAGToDAG.cpp77 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in SelectIndexedLoad()
133 if (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD) { in SelectIndexedLoad()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1444 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i32, Expand); in SparcTargetLowering()
1448 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, VT, Expand); in SparcTargetLowering()
1470 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand); in SparcTargetLowering()
1471 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); in SparcTargetLowering()
1472 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f64, Expand); in SparcTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZOperators.td531 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
546 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD;
H A DSystemZISelLowering.cpp301 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in SystemZTargetLowering()
335 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
613 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f80, Expand); in SystemZTargetLowering()
617 setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f32, Expand); in SystemZTargetLowering()
618 setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f64, Expand); in SystemZTargetLowering()
3872 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), Op.getValueType(), in lowerATOMIC_LOAD()
H A DSystemZISelDAGToDAG.cpp1000 (Load->getExtensionType() == ISD::EXTLOAD || in tryRISBGZero()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp313 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in MipsTargetLowering()
321 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); in MipsTargetLowering()
322 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand); in MipsTargetLowering()
329 setLoadExtAction(ISD::EXTLOAD, VT, F16VT, Expand); in MipsTargetLowering()
491 setLoadExtAction(ISD::EXTLOAD, MVT::i64, MVT::i32, Custom); in MipsTargetLowering()
2709 (ExtType == ISD::EXTLOAD)) in lowerLOAD()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp141 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp166 for (auto N : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) in RISCVTargetLowering()
332 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); in RISCVTargetLowering()
347 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in RISCVTargetLowering()
351 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand); in RISCVTargetLowering()
457 setLoadExtAction(ISD::EXTLOAD, OtherVT, VT, Expand); in RISCVTargetLowering()
532 setLoadExtAction(ISD::EXTLOAD, OtherVT, VT, Expand); in RISCVTargetLowering()
597 setLoadExtAction(ISD::EXTLOAD, VT, SmallVT, Expand); in RISCVTargetLowering()
628 setLoadExtAction(ISD::EXTLOAD, OtherVT, VT, Expand); in RISCVTargetLowering()
740 setLoadExtAction(ISD::EXTLOAD, OtherVT, VT, Expand); in RISCVTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp180 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Legal); in PPCTargetLowering()
181 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Legal); in PPCTargetLowering()
186 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand); in PPCTargetLowering()
189 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); in PPCTargetLowering()
384 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in PPCTargetLowering()
828 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
1119 setLoadExtAction(ISD::EXTLOAD, MVT::f128, FPT, Expand); in PPCTargetLowering()
6147 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg, in LowerCall_64SVR4()
7666 DAG.getExtLoad(ISD::EXTLOAD, dl, getPointerTy(DAG.getDataLayout()), Chain, in LowerLOAD()
13587 return LD->getExtensionType() == ISD::EXTLOAD && in isFPExtLoad()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.cpp103 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in initSPUActions()
110 setLoadExtAction(ISD::EXTLOAD, FPVT, OtherFPVT, Expand); in initSPUActions()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp136 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in LanaiTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp65 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()

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