| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 433 bool llvm::expandDivision(BinaryOperator *Div) { in expandDivision() argument
434 assert((Div->getOpcode() == Instruction::SDiv || in expandDivision()
435 Div->getOpcode() == Instruction::UDiv) && in expandDivision()
438 IRBuilder<> Builder(Div); in expandDivision()
440 assert(!Div->getType()->isVectorTy() && "Div over vectors not supported"); in expandDivision()
441 assert((Div->getType()->getIntegerBitWidth() == 32 || in expandDivision()
442 Div->getType()->getIntegerBitWidth() == 64) && in expandDivision()
446 if (Div->getOpcode() == Instruction::SDiv) { in expandDivision()
448 Value *Quotient = generateSignedDivisionCode(Div->getOperand(0), in expandDivision()
449 Div->getOperand(1), Builder); in expandDivision()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Utils/ |
| H A D | IntegerDivision.h | 41 bool expandDivision(BinaryOperator* Div);
62 bool expandDivisionUpTo32Bits(BinaryOperator *Div);
68 bool expandDivisionUpTo64Bits(BinaryOperator *Div);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 270 BinaryOperator *Div = dyn_cast<BinaryOperator>(Op0); in visitMul() local
271 if (!Div || (Div->getOpcode() != Instruction::UDiv && in visitMul()
272 Div->getOpcode() != Instruction::SDiv)) { in visitMul()
274 Div = dyn_cast<BinaryOperator>(Op1); in visitMul()
277 if (Div && Div->hasOneUse() && in visitMul()
278 (Div->getOperand(1) == Y || Div->getOperand(1) == Neg) && in visitMul()
279 (Div->getOpcode() == Instruction::UDiv || in visitMul()
280 Div->getOpcode() == Instruction::SDiv)) { in visitMul()
281 Value *X = Div->getOperand(0), *DivOp1 = Div->getOperand(1); in visitMul()
284 if (Div->isExact()) { in visitMul()
[all …]
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| H A D | InstCombineCompares.cpp | 2374 BinaryOperator *Div, in foldICmpDivConstant() argument
2383 if (!match(Div->getOperand(1), m_APInt(C2))) in foldICmpDivConstant()
2394 bool DivIsSigned = Div->getOpcode() == Instruction::SDiv; in foldICmpDivConstant()
2421 APInt RangeSize = Div->isExact() ? APInt(C2->getBitWidth(), 1) : *C2; in foldICmpDivConstant()
2462 if (Div->isExact()) in foldICmpDivConstant()
2489 Value *X = Div->getOperand(0); in foldICmpDivConstant()
2498 ConstantInt::get(Div->getType(), LoBound)); in foldICmpDivConstant()
2502 ConstantInt::get(Div->getType(), HiBound)); in foldICmpDivConstant()
2511 ConstantInt::get(Div->getType(), LoBound)); in foldICmpDivConstant()
2515 ConstantInt::get(Div->getType(), HiBound)); in foldICmpDivConstant()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | DivRemPairs.cpp | 58 Instruction *Div; in matchExpandedRem() local
63 m_Instruction(Div)), in matchExpandedRem()
68 M.Key.SignedOp = Div->getOpcode() == Instruction::SDiv; in matchExpandedRem()
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| /netbsd-src/external/bsd/pcc/dist/pcc/arch/m16c/ |
| H A D | TODO | 1 * Mul/Div does not work.
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedA55.td | 53 def CortexA55UnitFPDIV : ProcResource<1> { let BufferSize = 0; } // FP Div/SQRT, 64/128
74 // Div
152 // FP Mul, Div, Sqrt. Div/Sqrt are not pipelined
216 // Div
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| H A D | AArch64SchedThunderX.td | 41 def THXT8XUnitFPMDS : ProcResource<1> { let BufferSize = 0; } // FP Mul/Div/Sqrt
68 // Div
158 // FP Mul, Div, Sqrt
234 // Div
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| H A D | AArch64SchedA53.td | 46 def A53UnitFPMDS : ProcResource<1> { let BufferSize = 0; } // FP Mult/Div/Sqrt
70 // Div
131 // FP Mul, Div, Sqrt
191 // Div
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| H A D | AArch64SchedTSV110.td | 61 // Integer Mul/MAC/Div
90 // FP Div, Sqrt
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| /netbsd-src/share/i18n/csmapper/CBM/ |
| H A D | UCS%CBMINT.src | 13 # Information Systems Div.
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| H A D | CBMINT%UCS.src | 13 # Information Systems Div.
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCodeGenPrepare.cpp | 941 Value *Div = Builder.CreateAdd(IQ, JQ); in expandDivRem24Impl() local
943 Value *Res = Div; in expandDivRem24Impl()
946 Value *Rem = Builder.CreateMul(Div, Den); in expandDivRem24Impl()
1259 for (BinaryOperator *Div : Div64ToExpand) { in visitBinaryOperator()
1260 expandDivRem64(*Div); in visitBinaryOperator()
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| H A D | AMDGPUISelLowering.cpp | 1746 SDValue Div = DAG.getNode(ISD::ADD, DL, VT, iq, jq); in LowerDIVREM24() local
1749 SDValue Rem = DAG.getNode(ISD::MUL, DL, VT, Div, RHS); in LowerDIVREM24()
1756 Div = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Div, InRegSize); in LowerDIVREM24()
1760 Div = DAG.getNode(ISD::AND, DL, VT, Div, TruncMask); in LowerDIVREM24()
1764 return DAG.getMergeValues({ Div, Rem }, DL); in LowerDIVREM24()
1928 SDValue Div = DAG.getSelectCC(DL, C3, Zero, Sel1, Mulhi3, ISD::SETNE); in LowerUDIVREM64() local
1933 Results.push_back(Div); in LowerUDIVREM64()
2081 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS); in LowerSDIVREM() local
2082 SDValue Rem = Div.getValue(1); in LowerSDIVREM()
2084 Div = DAG.getNode(ISD::XOR, DL, VT, Div, DSign); in LowerSDIVREM()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/clang/include/clang/AST/ |
| H A D | CommentHTMLTags.td | 20 def Div : Tag<"div">;
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| H A D | StmtVisitor.h | 127 BINOP_FALLBACK(Mul) BINOP_FALLBACK(Div) BINOP_FALLBACK(Rem) in BINOP_FALLBACK()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCExpr.h | 484 Div, ///< Signed division. enumerator
535 return create(Div, LHS, RHS, Ctx); in createDiv()
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| /netbsd-src/external/bsd/pcc/dist/pcc/arch/i86/ |
| H A D | TODO | 16 Maths optimisation. Div/mul on 8086 are *slow* so generate stack/double and
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/ |
| H A D | MCExpr.cpp | 140 case MCBinaryExpr::Div: OS << '/'; break; in print()
950 case MCBinaryExpr::Div: in evaluateAsRelocatableImpl()
960 if (ABE->getOpcode() == MCBinaryExpr::Div) in evaluateAsRelocatableImpl()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | LoopCacheAnalysis.cpp | 377 const SCEV *Div = SE.getUDivExactExpr(AccessFn, ElemSize); in delinearize() local
378 Subscripts.push_back(Div); in delinearize()
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| H A D | BranchProbabilityInfo.cpp | 440 uint32_t Div = static_cast<uint32_t>( in calcMetadataWeights() local
442 BP[I] = BranchProbability::getRaw(Div); in calcMetadataWeights()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/ |
| H A D | ConstantFold.cpp | 2629 Constant *Div = ConstantExpr::getSDiv(CurrIdx, Factor); in ConstantFoldGetElementPtr() local
2633 Div->getType()->getScalarSizeInBits()); in ConstantFoldGetElementPtr()
2638 Type *ExtendedTy = Type::getIntNTy(Div->getContext(), CommonExtendedWidth); in ConstantFoldGetElementPtr()
2649 if (!Div->getType()->isIntOrIntVectorTy(CommonExtendedWidth)) in ConstantFoldGetElementPtr()
2650 Div = ConstantExpr::getSExt(Div, ExtendedTy); in ConstantFoldGetElementPtr()
2652 NewIdxs[i - 1] = ConstantExpr::getAdd(PrevIdx, Div); in ConstantFoldGetElementPtr()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM4.td | 105 // Most FP instructions are single-cycle latency, except MAC's, Div's and Sqrt's.
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/nds32/ |
| H A D | nds32-fpu.md | 238 ;; Div Instructions.
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/nds32/ |
| H A D | nds32-fpu.md | 238 ;; Div Instructions.
|