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Searched refs:DL (Results 1 – 25 of 809) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZSelectionDAGInfo.cpp25 static SDValue emitMemMem(SelectionDAG &DAG, const SDLoc &DL, unsigned Sequence, in emitMemMem() argument
41 return DAG.getNode(Loop, DL, MVT::Other, Chain, Dst, Src, in emitMemMem()
42 DAG.getConstant(Size, DL, PtrVT), in emitMemMem()
43 DAG.getConstant(Size / 256, DL, PtrVT)); in emitMemMem()
44 return DAG.getNode(Sequence, DL, MVT::Other, Chain, Dst, Src, in emitMemMem()
45 DAG.getConstant(Size, DL, PtrVT)); in emitMemMem()
49 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy() argument
56 return emitMemMem(DAG, DL, SystemZISD::MVC, SystemZISD::MVC_LOOP, in EmitTargetCodeForMemcpy()
64 static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in memsetStore() argument
71 Chain, DL, DAG.getConstant(StoreVal, DL, MVT::getIntegerVT(Size * 8)), in memsetStore()
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H A DSystemZISelLowering.cpp685 EVT SystemZTargetLowering::getSetCCResultType(const DataLayout &DL, in getSetCCResultType() argument
962 bool SystemZTargetLowering::isLegalAddressingMode(const DataLayout &DL, in isLegalAddressingMode() argument
1318 static SDValue convertLocVTToValVT(SelectionDAG &DAG, const SDLoc &DL, in convertLocVTToValVT() argument
1324 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1327 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1331 Value = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Value); in convertLocVTToValVT()
1337 Value = DAG.getBuildVector(MVT::v2i64, DL, {Value, DAG.getUNDEF(MVT::i64)}); in convertLocVTToValVT()
1338 Value = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Value); in convertLocVTToValVT()
1347 static SDValue convertValVTToLocVT(SelectionDAG &DAG, const SDLoc &DL, in convertValVTToLocVT() argument
1351 return DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
H A DVNCoercion.cpp18 const DataLayout &DL) { in canCoerceMustAliasedValueToLoad() argument
30 uint64_t StoreSize = DL.getTypeSizeInBits(StoredTy).getFixedSize(); in canCoerceMustAliasedValueToLoad()
37 if (StoreSize < DL.getTypeSizeInBits(LoadTy).getFixedSize()) in canCoerceMustAliasedValueToLoad()
40 bool StoredNI = DL.isNonIntegralPointerType(StoredTy->getScalarType()); in canCoerceMustAliasedValueToLoad()
41 bool LoadNI = DL.isNonIntegralPointerType(LoadTy->getScalarType()); in canCoerceMustAliasedValueToLoad()
60 if (StoredNI && StoreSize != DL.getTypeSizeInBits(LoadTy).getFixedSize()) in canCoerceMustAliasedValueToLoad()
69 const DataLayout &DL) { in coerceAvailableValueToLoadTypeHelper() argument
70 assert(canCoerceMustAliasedValueToLoad(StoredVal, LoadedTy, DL) && in coerceAvailableValueToLoadTypeHelper()
73 StoredVal = ConstantFoldConstant(C, DL); in coerceAvailableValueToLoadTypeHelper()
78 uint64_t StoredValSize = DL.getTypeSizeInBits(StoredValTy).getFixedSize(); in coerceAvailableValueToLoadTypeHelper()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DLoads.cpp35 const DataLayout &DL) { in isAligned() argument
36 Align BA = Base->getPointerAlignment(DL); in isAligned()
45 const Value *V, Align Alignment, const APInt &Size, const DataLayout &DL, in isDereferenceableAndAlignedPointer() argument
65 Size, DL, CtxI, DT, TLI, Visited, in isDereferenceableAndAlignedPointer()
68 Size, DL, CtxI, DT, TLI, Visited, in isDereferenceableAndAlignedPointer()
76 BC->getOperand(0), Alignment, Size, DL, CtxI, DT, TLI, in isDereferenceableAndAlignedPointer()
82 V->getPointerDereferenceableBytes(DL, CheckForNonNull, in isDereferenceableAndAlignedPointer()
86 if (!CheckForNonNull || isKnownNonZero(V, DL, 0, nullptr, CtxI, DT)) { in isDereferenceableAndAlignedPointer()
92 APInt Offset(DL.getTypeStoreSizeInBits(Ty), 0); in isDereferenceableAndAlignedPointer()
93 return isAligned(V, Offset, Alignment, DL); in isDereferenceableAndAlignedPointer()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.cpp322 const SDLoc &DL, SelectionDAG &DAG) const { in LowerReturn() argument
348 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
351 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
354 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
365 DAG.getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, MVT::i64), 0); in LowerReturn()
366 SDValue Sub_f32 = DAG.getTargetConstant(VE::sub_f32, DL, MVT::i32); in LowerReturn()
367 OutVal = SDValue(DAG.getMachineNode(TargetOpcode::INSERT_SUBREG, DL, in LowerReturn()
376 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag); in LowerReturn()
389 return DAG.getNode(VEISD::RET_FLAG, DL, MVT::Other, RetOps); in LowerReturn()
394 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
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H A DVEFrameLowering.cpp141 DebugLoc DL; in emitPrologueInsns() local
152 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
157 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
164 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
169 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
176 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
189 DebugLoc DL; in emitEpilogueInsns() local
200 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX17) in emitEpilogueInsns()
205 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX16) in emitEpilogueInsns()
209 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX15) in emitEpilogueInsns()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp823 EVT RISCVTargetLowering::getSetCCResultType(const DataLayout &DL, in getSetCCResultType() argument
827 return getPointerTy(DL); in getSetCCResultType()
862 bool RISCVTargetLowering::isLegalAddressingMode(const DataLayout &DL, in isLegalAddressingMode() argument
987 static void translateSetCCForBranch(const SDLoc &DL, SDValue &LHS, SDValue &RHS, in translateSetCCForBranch() argument
991 RHS = DAG.getConstant(0, DL, RHS.getValueType()); in translateSetCCForBranch()
998 LHS = DAG.getConstant(0, DL, RHS.getValueType()); in translateSetCCForBranch()
1258 SDLoc DL(V); in convertToScalableVector() local
1259 SDValue Zero = DAG.getConstant(0, DL, Subtarget.getXLenVT()); in convertToScalableVector()
1260 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT, DAG.getUNDEF(VT), V, Zero); in convertToScalableVector()
1270 SDLoc DL(V); in convertFromScalableVector() local
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H A DRISCVExpandAtomicPseudoInsts.cpp217 DebugLoc DL, MachineBasicBlock *ThisMBB, in doAtomicBinOpExpansion() argument
233 BuildMI(LoopMBB, DL, TII->get(getLRForRMW(Ordering, Width)), DestReg) in doAtomicBinOpExpansion()
239 BuildMI(LoopMBB, DL, TII->get(RISCV::AND), ScratchReg) in doAtomicBinOpExpansion()
242 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) in doAtomicBinOpExpansion()
247 BuildMI(LoopMBB, DL, TII->get(getSCForRMW(Ordering, Width)), ScratchReg) in doAtomicBinOpExpansion()
250 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doAtomicBinOpExpansion()
256 static void insertMaskedMerge(const RISCVInstrInfo *TII, DebugLoc DL, in insertMaskedMerge() argument
267 BuildMI(MBB, DL, TII->get(RISCV::XOR), ScratchReg) in insertMaskedMerge()
270 BuildMI(MBB, DL, TII->get(RISCV::AND), ScratchReg) in insertMaskedMerge()
273 BuildMI(MBB, DL, TII->get(RISCV::XOR), DestReg) in insertMaskedMerge()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/
H A DMangler.cpp35 const DataLayout &DL, char Prefix) { in getNameWithPrefixImpl() argument
47 if (DL.doNotMangleLeadingQuestionMark() && Name[0] == '?') in getNameWithPrefixImpl()
51 OS << DL.getPrivateGlobalPrefix(); in getNameWithPrefixImpl()
53 OS << DL.getLinkerPrivateGlobalPrefix(); in getNameWithPrefixImpl()
63 const DataLayout &DL, in getNameWithPrefixImpl() argument
65 char Prefix = DL.getGlobalPrefix(); in getNameWithPrefixImpl()
66 return getNameWithPrefixImpl(OS, GVName, PrefixTy, DL, Prefix); in getNameWithPrefixImpl()
70 const DataLayout &DL) { in getNameWithPrefix() argument
71 return getNameWithPrefixImpl(OS, GVName, DL, Default); in getNameWithPrefix()
75 const Twine &GVName, const DataLayout &DL) { in getNameWithPrefix() argument
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/netbsd-src/external/apache2/llvm/dist/llvm/bindings/ocaml/target/
H A Dtarget_ocaml.c69 value llvm_datalayout_byte_order(value DL) { in llvm_datalayout_byte_order() argument
70 return Val_int(LLVMByteOrder(DataLayout_val(DL))); in llvm_datalayout_byte_order()
74 value llvm_datalayout_pointer_size(value DL) { in llvm_datalayout_pointer_size() argument
75 return Val_int(LLVMPointerSize(DataLayout_val(DL))); in llvm_datalayout_pointer_size()
79 LLVMTypeRef llvm_datalayout_intptr_type(LLVMContextRef C, value DL) { in llvm_datalayout_intptr_type() argument
80 return LLVMIntPtrTypeInContext(C, DataLayout_val(DL)); in llvm_datalayout_intptr_type()
84 value llvm_datalayout_qualified_pointer_size(value AS, value DL) { in llvm_datalayout_qualified_pointer_size() argument
85 return Val_int(LLVMPointerSizeForAS(DataLayout_val(DL), Int_val(AS))); in llvm_datalayout_qualified_pointer_size()
90 value DL) { in llvm_datalayout_qualified_intptr_type() argument
91 return LLVMIntPtrTypeForASInContext(C, DataLayout_val(DL), Int_val(AS)); in llvm_datalayout_qualified_intptr_type()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp480 SDLoc DL(Op); in LowerOperation() local
486 DAG.getConstant(0, DL, MVT::i32), // SWZ_X in LowerOperation()
487 DAG.getConstant(1, DL, MVT::i32), // SWZ_Y in LowerOperation()
488 DAG.getConstant(2, DL, MVT::i32), // SWZ_Z in LowerOperation()
489 DAG.getConstant(3, DL, MVT::i32) // SWZ_W in LowerOperation()
491 return DAG.getNode(AMDGPUISD::R600_EXPORT, DL, Op.getValueType(), Args); in LowerOperation()
504 SDLoc DL(Op); in LowerOperation() local
521 DAG.getConstant(TextureOp, DL, MVT::i32), in LowerOperation()
523 DAG.getConstant(0, DL, MVT::i32), in LowerOperation()
524 DAG.getConstant(1, DL, MVT::i32), in LowerOperation()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp576 SDLoc DL(N); in performDivRemCombine() local
578 SDValue DivRem = DAG.getNode(Opc, DL, MVT::Glue, in performDivRemCombine()
585 SDValue CopyFromLo = DAG.getCopyFromReg(InChain, DL, LO, Ty, in performDivRemCombine()
594 SDValue CopyFromHi = DAG.getCopyFromReg(InChain, DL, in performDivRemCombine()
653 SDLoc DL(Op); in createFPCmp() local
659 return DAG.getNode(MipsISD::FPCmp, DL, MVT::Glue, LHS, RHS, in createFPCmp()
660 DAG.getConstant(condCodeToFCC(CC), DL, MVT::i32)); in createFPCmp()
665 SDValue False, const SDLoc &DL) { in createCMovFP() argument
670 return DAG.getNode((invert ? MipsISD::CMovFP_F : MipsISD::CMovFP_T), DL, in createCMovFP()
704 const SDLoc DL(N); in performSELECTCombine() local
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H A DMipsSEISelLowering.cpp414 SDLoc DL(Op); in lowerSELECT() local
419 SDValue Tmp = DAG.getNode(MipsISD::MTC1_D64, DL, MVT::f64, Op->getOperand(0)); in lowerSELECT()
420 return DAG.getNode(MipsISD::FSELECT, DL, ResTy, Tmp, Op->getOperand(1), in lowerSELECT()
793 static SDValue genConstMult(SDValue X, APInt C, const SDLoc &DL, EVT VT, in genConstMult() argument
797 return DAG.getConstant(0, DL, VT); in genConstMult()
805 return DAG.getNode(ISD::SHL, DL, VT, X, in genConstMult()
806 DAG.getConstant(C.logBase2(), DL, ShiftTy)); in genConstMult()
817 SDValue Op0 = genConstMult(X, Floor, DL, VT, ShiftTy, DAG); in genConstMult()
818 SDValue Op1 = genConstMult(X, C - Floor, DL, VT, ShiftTy, DAG); in genConstMult()
819 return DAG.getNode(ISD::ADD, DL, VT, Op0, Op1); in genConstMult()
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H A DMipsSEISelDAGToDAG.cpp206 void MipsSEDAGToDAGISel::selectAddE(SDNode *Node, const SDLoc &DL) const { in selectAddE()
234 SDValue CstOne = CurDAG->getTargetConstant(1, DL, MVT::i32); in selectAddE()
236 SDValue OuFlag = CurDAG->getTargetConstant(20, DL, MVT::i32); in selectAddE()
238 SDNode *DSPCtrlField = CurDAG->getMachineNode(Mips::RDDSP, DL, MVT::i32, in selectAddE()
242 Mips::EXT, DL, MVT::i32, SDValue(DSPCtrlField, 0), OuFlag, CstOne); in selectAddE()
245 CurDAG->getTargetConstant(6, DL, MVT::i32), CstOne, in selectAddE()
247 SDNode *DSPCFWithCarry = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, Ops); in selectAddE()
258 CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, InsOps); in selectAddE()
260 SDNode *WrDSP = CurDAG->getMachineNode(Mips::WRDSP, DL, MVT::Glue, in selectAddE()
737 SDLoc DL(Node); in trySelect() local
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H A DMipsBranchExpansion.cpp158 void replaceBranch(MachineBasicBlock &MBB, Iter Br, const DebugLoc &DL,
161 MachineBasicBlock::iterator Pos, DebugLoc DL);
335 const DebugLoc &DL, in replaceBranch() argument
340 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc); in replaceBranch()
376 DebugLoc DL) { in buildProperJumpMI() argument
396 BuildMI(*MBB, Pos, DL, TII->get(JumpOp)).addReg(ATReg); in buildProperJumpMI()
411 DebugLoc DL = I.Br->getDebugLoc(); in expandToLongBranch() local
465 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
468 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)) in expandToLongBranch()
489 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) in expandToLongBranch()
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H A DMipsISelLowering.h306 DataLayout DL) const override { in getABIAlignmentForCallingConv() argument
307 const Align ABIAlign = DL.getABITypeAlign(ArgTy); in getABIAlignmentForCallingConv()
331 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
378 SDValue getAddrLocal(NodeTy *N, const SDLoc &DL, EVT Ty, SelectionDAG &DAG, in getAddrLocal() argument
381 SDValue GOT = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty), in getAddrLocal()
384 DAG.getLoad(Ty, DL, DAG.getEntryNode(), GOT, in getAddrLocal()
387 SDValue Lo = DAG.getNode(MipsISD::Lo, DL, Ty, in getAddrLocal()
389 return DAG.getNode(ISD::ADD, DL, Ty, Load, Lo); in getAddrLocal()
397 SDValue getAddrGlobal(NodeTy *N, const SDLoc &DL, EVT Ty, SelectionDAG &DAG, in getAddrGlobal() argument
400 SDValue Tgt = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty), in getAddrGlobal()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp162 EVT M68kTargetLowering::getSetCCResultType(const DataLayout &DL, in getSetCCResultType() argument
168 MVT M68kTargetLowering::getScalarShiftAmountTy(const DataLayout &DL, in getScalarShiftAmountTy() argument
173 return MVT::getIntegerVT(8 * DL.getPointerSize(0)); in getScalarShiftAmountTy()
212 SelectionDAG &DAG, const SDLoc &DL) { in CreateCopyOfByValArgument() argument
213 SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), DL, MVT::i32); in CreateCopyOfByValArgument()
216 Chain, DL, Dst, Src, SizeNode, Flags.getNonZeroByValAlign(), in CreateCopyOfByValArgument()
349 const SDLoc &DL) const { in EmitTailCallLoadRetAddr()
354 OutRetAddr = DAG.getLoad(VT, DL, Chain, OutRetAddr, MachinePointerInfo()); in EmitTailCallLoadRetAddr()
360 EVT PtrVT, unsigned SlotSize, int FPDiff, const SDLoc &DL) const { in EmitTailCallStoreRetAddr()
371 Chain, DL, RetFI, NewFI, in EmitTailCallStoreRetAddr()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelDAGToDAG.cpp84 bool fillGenericConstant(const DataLayout &DL, const Constant *CV,
86 bool fillConstantDataArray(const DataLayout &DL, const ConstantDataArray *CDA,
88 bool fillConstantArray(const DataLayout &DL, const ConstantArray *CA,
90 bool fillConstantStruct(const DataLayout &DL, const ConstantStruct *CS,
102 SDLoc DL(Addr); in SelectAddr() local
105 Offset = CurDAG->getTargetConstant(0, DL, MVT::i64); in SelectAddr()
125 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64); in SelectAddr()
131 Offset = CurDAG->getTargetConstant(0, DL, MVT::i64); in SelectAddr()
138 SDLoc DL(Addr); in SelectFIAddr() local
153 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64); in SelectFIAddr()
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H A DBPFISelLowering.cpp38 static void fail(const SDLoc &DL, SelectionDAG &DAG, const Twine &Msg) { in fail() argument
41 DiagnosticInfoUnsupported(MF.getFunction(), Msg, DL.getDebugLoc())); in fail()
44 static void fail(const SDLoc &DL, SelectionDAG &DAG, const char *Msg, in fail() argument
53 DiagnosticInfoUnsupported(MF.getFunction(), Str, DL.getDebugLoc())); in fail()
277 SDLoc DL(N); in ReplaceNodeResults() local
278 fail(DL, DAG, err_msg); in ReplaceNodeResults()
301 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
335 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerFormalArguments()
340 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerFormalArguments()
343 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp398 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
403 return LowerCCCArguments(Chain, CallConv, IsVarArg, Ins, DL, DAG, InVals); in LowerFormalArguments()
412 SDLoc &DL = CLI.DL; in LowerCall() local
429 OutVals, Ins, DL, DAG, InVals); in LowerCall()
439 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCArguments() argument
465 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerCCCArguments()
471 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
474 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
505 VA.getLocVT(), DL, Chain, FIN, in LowerCCCArguments()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp207 const DebugLoc &DL, in emitSPUpdate() argument
227 BuildMI(MBB, MBBI, DL, TII.get(X86::STACKALLOC_W_PROBING)).addImm(Offset); in emitSPUpdate()
244 BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Reg) in emitSPUpdate()
247 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr) in emitSPUpdate()
261 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r)) in emitSPUpdate()
270 BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Rax) in emitSPUpdate()
273 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax) in emitSPUpdate()
279 BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax), in emitSPUpdate()
282 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr), in emitSPUpdate()
300 BuildMI(MBB, MBBI, DL, TII.get(Opc)) in emitSPUpdate()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp366 static MachineBasicBlock *LowerFPToInt(MachineInstr &MI, DebugLoc DL, in LowerFPToInt() argument
423 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
425 BuildMI(BB, DL, TII.get(FConst), Tmp1) in LowerFPToInt()
427 BuildMI(BB, DL, TII.get(LT), CmpReg).addReg(Tmp0).addReg(Tmp1); in LowerFPToInt()
435 BuildMI(BB, DL, TII.get(FConst), Tmp1) in LowerFPToInt()
437 BuildMI(BB, DL, TII.get(GE), SecondCmpReg).addReg(Tmp0).addReg(Tmp1); in LowerFPToInt()
438 BuildMI(BB, DL, TII.get(And), AndReg).addReg(CmpReg).addReg(SecondCmpReg); in LowerFPToInt()
442 BuildMI(BB, DL, TII.get(Eqz), EqzReg).addReg(CmpReg); in LowerFPToInt()
446 BuildMI(BB, DL, TII.get(WebAssembly::BR_IF)).addMBB(TrueMBB).addReg(EqzReg); in LowerFPToInt()
447 BuildMI(FalseMBB, DL, TII.get(LoweredOpcode), FalseReg).addReg(InReg); in LowerFPToInt()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
H A DSROA.cpp224 AllocaSlices(const DataLayout &DL, AllocaInst &AI);
657 SliceBuilder(const DataLayout &DL, AllocaInst &AI, AllocaSlices &AS) in SliceBuilder() argument
658 : PtrUseVisitor<SliceBuilder>(DL), in SliceBuilder()
659 AllocSize(DL.getTypeAllocSize(AI.getAllocatedType()).getFixedSize()), in SliceBuilder()
731 const DataLayout &DL = GEPI.getModule()->getDataLayout(); in visitGetElementPtrInst() local
742 const StructLayout *SL = DL.getStructLayout(STy); in visitGetElementPtrInst()
752 DL.getTypeAllocSize(GTI.getIndexedType()).getFixedSize()); in visitGetElementPtrInst()
784 LI.getPointerAddressSpace() != DL.getAllocaAddrSpace()) in visitLoadInst()
790 uint64_t Size = DL.getTypeStoreSize(LI.getType()).getFixedSize(); in visitLoadInst()
802 SI.getPointerAddressSpace() != DL.getAllocaAddrSpace()) in visitStoreInst()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
H A DValueTracking.h59 const DataLayout &DL, unsigned Depth = 0,
75 KnownBits &Known, const DataLayout &DL,
83 KnownBits computeKnownBits(const Value *V, const DataLayout &DL,
92 const DataLayout &DL, unsigned Depth = 0,
107 const DataLayout &DL,
118 bool isKnownToBeAPowerOfTwo(const Value *V, const DataLayout &DL,
133 bool isKnownNonZero(const Value *V, const DataLayout &DL, unsigned Depth = 0,
146 bool isKnownNonNegative(const Value *V, const DataLayout &DL,
155 bool isKnownPositive(const Value *V, const DataLayout &DL, unsigned Depth = 0,
163 bool isKnownNegative(const Value *V, const DataLayout &DL, unsigned Depth = 0,
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Utils/
H A DVNCoercion.h38 const DataLayout &DL);
47 IRBuilderBase &IRB, const DataLayout &DL);
55 StoreInst *DepSI, const DataLayout &DL);
63 const DataLayout &DL);
71 MemIntrinsic *DepMI, const DataLayout &DL);
77 Instruction *InsertPt, const DataLayout &DL);
81 Type *LoadTy, const DataLayout &DL);
88 Instruction *InsertPt, const DataLayout &DL);
92 Type *LoadTy, const DataLayout &DL);
100 const DataLayout &DL);
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