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Searched refs:DIVW (Results 1 – 7 of 7) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoM.td19 def riscv_divw : SDNode<"RISCVISD::DIVW", SDT_RISCVIntBinOpW>;
49 def DIVW : ALUW_rr<0b0000001, 0b100, "divw">,
78 def : PatGprGpr<riscv_divw, DIVW>;
H A DRISCVISelLowering.h53 DIVW, enumerator
H A DRISCVISelLowering.cpp4574 return RISCVISD::DIVW; in getRISCVWOpcode()
6149 case RISCVISD::DIVW: in ComputeNumSignBitsForTargetNode()
7900 NODE_NAME_CASE(DIVW) in getTargetNodeName()
/netbsd-src/sys/external/bsd/sljit/dist/sljit_src/
H A DsljitNativePPC_common.c161 #define DIVW (HI(31) | LO(491)) macro
1291 …FAIL_IF(push_inst(compiler, (int_op ? (op == SLJIT_DIVMOD_UW ? DIVWU : DIVW) : (op == SLJIT_DIVMOD… in sljit_emit_op0()
1294 …FAIL_IF(push_inst(compiler, (op == SLJIT_DIVMOD_UW ? DIVWU : DIVW) | D(SLJIT_R0) | A(SLJIT_R0) | B… in sljit_emit_op0()
1301 …return push_inst(compiler, (int_op ? (op == SLJIT_DIV_UW ? DIVWU : DIVW) : (op == SLJIT_DIV_UW ? D… in sljit_emit_op0()
1303 …return push_inst(compiler, (op == SLJIT_DIV_UW ? DIVWU : DIVW) | D(SLJIT_R0) | A(SLJIT_R0) | B(SLJ… in sljit_emit_op0()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DP9InstrResources.td948 DIVW,
990 (instregex "DIVW(U)?(O)?_rec$")
H A DPPCInstrInfo.td3149 defm DIVW : XOForm_1rcr<31, 491, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
H A DPPCISelLowering.cpp11742 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::DIVD : PPC::DIVW), Div) in emitProbedAlloca()