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Searched refs:CP_RB1_CNTL (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dnid.h502 #define CP_RB1_CNTL 0xC184 macro
H A Dsid.h1269 #define CP_RB1_CNTL 0xC184 macro
H A Dradeon_si.c3712 WREG32(CP_RB1_CNTL, tmp); in si_cp_resume()
3715 WREG32(CP_RB1_CNTL, tmp | RB_RPTR_WR_ENA); in si_cp_resume()
3724 WREG32(CP_RB1_CNTL, tmp); in si_cp_resume()
H A Dradeon_ni.c1640 CP_RB1_CNTL, in cayman_cp_resume()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsid.h1298 #define CP_RB1_CNTL 0x3061 macro
H A Damdgpu_gfx_v10_0.c2832 tmp = REG_SET_FIELD(0, CP_RB1_CNTL, RB_BUFSZ, rb_bufsz); in gfx_v10_0_cp_gfx_resume()
2833 tmp = REG_SET_FIELD(tmp, CP_RB1_CNTL, RB_BLKSZ, rb_bufsz - 2); in gfx_v10_0_cp_gfx_resume()