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Searched refs:ArgVT (Results 1 – 25 of 29) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DCallingConvLower.cpp95 MVT ArgVT = Ins[i].VT; in AnalyzeFormalArguments() local
97 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) in AnalyzeFormalArguments()
135 MVT ArgVT = Outs[i].VT; in AnalyzeCallOperands() local
137 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeCallOperands()
140 << EVT(ArgVT).getEVTString() << '\n'; in AnalyzeCallOperands()
153 MVT ArgVT = ArgVTs[i]; in AnalyzeCallOperands() local
155 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeCallOperands()
158 << EVT(ArgVT).getEVTString() << '\n'; in AnalyzeCallOperands()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h42 bool IsShortVectorType(EVT ArgVT) { in IsShortVectorType() argument
43 return ArgVT.isVector() && ArgVT.getStoreSize() <= 8; in IsShortVectorType()
60 ArgIsShortVector.push_back(IsShortVectorType(Ins[i].ArgVT)); in AnalyzeFormalArguments()
74 ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT)); in AnalyzeCallOperands()
H A DSystemZISelLowering.cpp1300 static void VerifyVectorType(MVT VT, EVT ArgVT) { in VerifyVectorType() argument
1301 if (ArgVT.isVector() && !VT.isVector()) in VerifyVectorType()
1307 VerifyVectorType(Ins[i].VT, Ins[i].ArgVT); in VerifyVectorTypes()
1312 VerifyVectorType(Outs[i].VT, Outs[i].ArgVT); in VerifyVectorTypes()
1598 SlotVT = Outs[I].ArgVT; in LowerCall()
1744 if (Out.ArgVT == MVT::i128) in CanLowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetCallingConv.h198 EVT ArgVT; member
216 ArgVT = argvt; in InputArg()
236 EVT ArgVT; member
255 ArgVT = argvt; in OutputArg()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCCCState.cpp19 if (I.ArgVT == llvm::MVT::ppcf128) in PreAnalyzeCallOperands()
29 if (I.ArgVT == llvm::MVT::ppcf128) { in PreAnalyzeFormalArguments()
H A DPPCFastISel.cpp1392 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs() local
1396 if (ArgVT.isVector() || ArgVT.getSizeInBits() > 64 || ArgVT == MVT::i1 || in processCallArgs()
1431 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs() local
1444 if (!PPCEmitIntExt(ArgVT, Arg, DestVT, TmpReg, /*IsZExt*/false)) in processCallArgs()
1446 ArgVT = DestVT; in processCallArgs()
1456 if (!PPCEmitIntExt(ArgVT, Arg, DestVT, TmpReg, /*IsZExt*/true)) in processCallArgs()
1458 ArgVT = DestVT; in processCallArgs()
1471 if (ArgVT == MVT::f32 || ArgVT == MVT::f64) { in processCallArgs()
1620 MVT ArgVT; in fastLowerCall() local
1621 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in fastLowerCall()
[all …]
H A DPPCISelLowering.cpp3814 static unsigned CalculateStackSlotSize(EVT ArgVT, ISD::ArgFlagsTy Flags, in CalculateStackSlotSize() argument
3816 unsigned ArgSize = ArgVT.getStoreSize(); in CalculateStackSlotSize()
3830 static Align CalculateStackSlotAlignment(EVT ArgVT, EVT OrigVT, in CalculateStackSlotAlignment() argument
3836 if (ArgVT == MVT::v4f32 || ArgVT == MVT::v4i32 || in CalculateStackSlotAlignment()
3837 ArgVT == MVT::v8i16 || ArgVT == MVT::v16i8 || in CalculateStackSlotAlignment()
3838 ArgVT == MVT::v2f64 || ArgVT == MVT::v2i64 || in CalculateStackSlotAlignment()
3839 ArgVT == MVT::v1i128 || ArgVT == MVT::f128) in CalculateStackSlotAlignment()
3862 Alignment = Align(ArgVT.getStoreSize()); in CalculateStackSlotAlignment()
3872 static bool CalculateStackSlotUsed(EVT ArgVT, EVT OrigVT, ISD::ArgFlagsTy Flags, in CalculateStackSlotUsed() argument
3881 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in CalculateStackSlotUsed()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1155 MVT ArgVT = OutVTs[VA.getValNo()]; in processCallArgs() local
1158 firstMVT = ArgVT; in processCallArgs()
1159 if (ArgVT == MVT::f32) { in processCallArgs()
1161 } else if (ArgVT == MVT::f64) { in processCallArgs()
1169 if (ArgVT == MVT::f32) { in processCallArgs()
1171 } else if (ArgVT == MVT::f64) { in processCallArgs()
1179 if (((ArgVT == MVT::i32) || (ArgVT == MVT::f32) || (ArgVT == MVT::i16) || in processCallArgs()
1180 (ArgVT == MVT::i8)) && in processCallArgs()
1210 MVT SrcVT = ArgVT; in processCallArgs()
1218 MVT SrcVT = ArgVT; in processCallArgs()
[all …]
H A DMipsCCState.cpp125 originalEVTTypeIsVectorFloat(Out.ArgVT)); in PreAnalyzeReturnForVectorFloat()
H A DMipsISelLowering.cpp3326 unsigned ValSizeInBits = Outs[i].ArgVT.getSizeInBits(); in LowerCall()
3504 unsigned ValSizeInBits = Ins[i].ArgVT.getSizeInBits(); in LowerCallResult()
3546 EVT ArgVT, const SDLoc &DL, in UnpackFromArgumentSlot() argument
3558 unsigned ValSizeInBits = ArgVT.getSizeInBits(); in UnpackFromArgumentSlot()
3673 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
3719 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
3845 unsigned ValSizeInBits = Outs[i].ArgVT.getSizeInBits(); in LowerReturn()
H A DMipsCallLowering.cpp366 Arguments[i].VT, Arguments[i].ArgVT, Arguments[i].Flags); in setLocInfo()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1888 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs() local
1891 if (ArgVT.isVector() || ArgVT.getSizeInBits() > 64) in ProcessCallArgs()
1904 switch (ArgVT.SimpleTy) { in ProcessCallArgs()
1940 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs() local
1942 assert((!ArgVT.isVector() && ArgVT.getSizeInBits() <= 64) && in ProcessCallArgs()
1950 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false); in ProcessCallArgs()
1952 ArgVT = DestVT; in ProcessCallArgs()
1959 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true); in ProcessCallArgs()
1961 ArgVT = DestVT; in ProcessCallArgs()
1965 unsigned BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg); in ProcessCallArgs()
[all …]
H A DARMISelLowering.cpp2352 auto ArgVT = Outs[realArgIdx].ArgVT; in LowerCall() local
2353 if (isCmseNSCall && (ArgVT == MVT::f16)) { in LowerCall()
2355 auto MaskValue = APInt::getLowBitsSet(LocBits, ArgVT.getSizeInBits()); in LowerCall()
3029 auto RetVT = Outs[realRVLocIdx].ArgVT; in LowerReturn()
9293 EVT ArgVT = Arg.getValueType(); in LowerFSINCOS() local
9294 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in LowerFSINCOS()
9332 (ArgVT == MVT::f64) ? RTLIB::SINCOS_STRET_F64 : RTLIB::SINCOS_STRET_F32; in LowerFSINCOS()
9348 DAG.getLoad(ArgVT, dl, CallResult.second, SRet, MachinePointerInfo()); in LowerFSINCOS()
9352 DAG.getIntPtrConstant(ArgVT.getStoreSize(), dl)); in LowerFSINCOS()
9354 DAG.getLoad(ArgVT, dl, LoadSin.getValue(1), Add, MachinePointerInfo()); in LowerFSINCOS()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FastISel.cpp3080 EVT ArgVT = TLI.getValueType(DL, ArgTy); in fastLowerArguments() local
3081 if (!ArgVT.isSimple()) return false; in fastLowerArguments()
3082 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
3306 MVT ArgVT = OutVTs[VA.getValNo()]; in fastLowerCall() local
3308 if (ArgVT == MVT::x86mmx) in fastLowerCall()
3320 if (ArgVT == MVT::i1) in fastLowerCall()
3324 ArgVT, ArgReg); in fastLowerCall()
3326 ArgVT = VA.getLocVT(); in fastLowerCall()
3334 if (ArgVT == MVT::i1) { in fastLowerCall()
3337 ArgVT = MVT::i8; in fastLowerCall()
[all …]
H A DX86ISelLowering.cpp3271 EVT ArgVT = Ins[i].ArgVT; in LowerMemArgument() local
3278 ArgVT.isVector() && !VA.getLocVT().isVector() && in LowerMemArgument()
3279 VA.getLocVT().getSizeInBits() != ArgVT.getScalarSizeInBits(); in LowerMemArgument()
3294 int FI = MFI.CreateFixedObject(ArgVT.getStoreSize(), VA.getLocMemOffset(), in LowerMemArgument()
24635 EVT ArgVT = Op.getNode()->getValueType(0); in LowerVAARG() local
24636 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in LowerVAARG()
24643 assert(ArgVT != MVT::f80 && "va_arg for f80 not yet implemented"); in LowerVAARG()
24644 if (ArgVT.isFloatingPoint() && ArgSize <= 16 /*bytes*/) { in LowerVAARG()
24647 assert(ArgVT.isInteger() && ArgSize <= 32 /*bytes*/ && in LowerVAARG()
24674 return DAG.getLoad(ArgVT, dl, Chain, VAARG, MachinePointerInfo()); in LowerVAARG()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp498 MVT ArgVT = Args[ValNo].VT; in AnalyzeArguments() local
500 MVT LocVT = ArgVT; in AnalyzeArguments()
516 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, Align(2), ArgFlags); in AnalyzeArguments()
530 State.addLoc(CCValAssign::getReg(ValNo++, ArgVT, Reg, LocVT, LocInfo)); in AnalyzeArguments()
534 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
538 State.addLoc(CCValAssign::getReg(ValNo++, ArgVT, Reg, LocVT, LocInfo)); in AnalyzeArguments()
544 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1052 EVT ArgVT = ValueVTs[Value]; in analyzeFormalArgumentsCompute() local
1053 EVT MemVT = ArgVT; in analyzeFormalArgumentsCompute()
1054 MVT RegisterVT = getRegisterTypeForCallingConv(Ctx, CC, ArgVT); in analyzeFormalArgumentsCompute()
1055 unsigned NumRegs = getNumRegistersForCallingConv(Ctx, CC, ArgVT); in analyzeFormalArgumentsCompute()
1059 if (ArgVT.isExtended()) { in analyzeFormalArgumentsCompute()
1064 MemVT = ArgVT; in analyzeFormalArgumentsCompute()
1066 } else if (ArgVT.isVector() && RegisterVT.isVector() && in analyzeFormalArgumentsCompute()
1067 ArgVT.getScalarType() == RegisterVT.getScalarType()) { in analyzeFormalArgumentsCompute()
1068 assert(ArgVT.getVectorNumElements() > RegisterVT.getVectorNumElements()); in analyzeFormalArgumentsCompute()
1073 } else if (ArgVT.isVector() && in analyzeFormalArgumentsCompute()
[all …]
H A DSIInstrInfo.td2071 field list<ValueType> ArgVT = _ArgVT;
2075 field ValueType DstVT = ArgVT[0];
2076 field ValueType Src0VT = ArgVT[1];
2077 field ValueType Src1VT = ArgVT[2];
2078 field ValueType Src2VT = ArgVT[3];
2210 class VOP_NO_EXT <VOPProfile p> : VOPProfile <p.ArgVT> {
2218 class VOP_PAT_GEN <VOPProfile p, int mode=PatGenMode.Pattern> : VOPProfile <p.ArgVT> {
H A DVOP3Instructions.td179 class VOP3_Profile<VOPProfile P, VOP3Features Features = VOP3_REGULAR> : VOPProfile<P.ArgVT> {
262 class VOP3_INTERP16 <list<ValueType> ArgVT> : VOPProfile<ArgVT> {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp2911 EVT ArgVT = TLI.getValueType(DL, ArgTy); in fastLowerArguments() local
2912 if (!ArgVT.isSimple()) in fastLowerArguments()
2915 MVT VT = ArgVT.getSimpleVT().SimpleTy; in fastLowerArguments()
3010 MVT ArgVT = OutVTs[VA.getValNo()]; in processCallArgs() local
3022 MVT SrcVT = ArgVT; in processCallArgs()
3032 MVT SrcVT = ArgVT; in processCallArgs()
3058 unsigned ArgSize = (ArgVT.getSizeInBits() + 7) / 8; in processCallArgs()
3072 MachineMemOperand::MOStore, ArgVT.getStoreSize(), Alignment); in processCallArgs()
3074 if (!emitStore(ArgVT, ArgReg, Addr, MMO)) in processCallArgs()
H A DAArch64ISelLowering.cpp3432 EVT ArgVT = Arg.getValueType(); in LowerFSINCOS() local
3433 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in LowerFSINCOS()
3444 RTLIB::Libcall LC = ArgVT == MVT::f64 ? RTLIB::SINCOS_STRET_F64 in LowerFSINCOS()
5533 MVT ArgVT = Outs[i].VT; in LowerCall() local
5534 if (!Outs[i].IsFixed && ArgVT.isScalableVector()) in LowerCall()
5545 bool Res = AssignFn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); in LowerCall()
5660 if (Outs[i].ArgVT == MVT::i1) { in LowerCall()
6007 if (Outs[i].ArgVT == MVT::i1) { in LowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp6894 MVT ArgVT = ArgIdx.value().VT; in preAssignMask() local
6895 if (ArgVT.isVector() && ArgVT.getVectorElementType() == MVT::i1) in preAssignMask()
6912 MVT ArgVT = Ins[i].VT; in analyzeInputArgs() local
6922 if (CC_RISCV(MF.getDataLayout(), ABI, i, ArgVT, ArgVT, CCValAssign::Full, in analyzeInputArgs()
6926 << EVT(ArgVT).getEVTString() << '\n'); in analyzeInputArgs()
6943 MVT ArgVT = Outs[i].VT; in analyzeOutputArgs() local
6948 if (CC_RISCV(MF.getDataLayout(), ABI, i, ArgVT, ArgVT, CCValAssign::Full, in analyzeOutputArgs()
6952 << EVT(ArgVT).getEVTString() << "\n"); in analyzeOutputArgs()
7553 std::max(getPrefTypeAlign(Outs[i].ArgVT, DAG), in LowerCall()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp1984 EVT ArgVT = Op.getValueType(); in ExpandLibCall() local
1985 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in ExpandLibCall()
1988 Entry.IsSExt = TLI.shouldSignExtendTypeInLibCall(ArgVT, isSigned); in ExpandLibCall()
1989 Entry.IsZExt = !TLI.shouldSignExtendTypeInLibCall(ArgVT, isSigned); in ExpandLibCall()
2155 EVT ArgVT = Op.getValueType(); in ExpandDivRemLibCall() local
2156 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in ExpandDivRemLibCall()
H A DFastISel.cpp1019 MyFlags.ArgVT = VT; in lowerCallTo()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp2131 EVT ArgVT = Arg.getValueType(); in LowerF128_LibCallArg() local
2132 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in LowerF128_LibCallArg()

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